feat(hslm): Fully Ternary Transformer — 0 floating point operations

[gHashTag]

Fully Ternary Transformer — 0 FP Operations

Overview

Transform HSLM from "ternary weights + f32 everything else" to fully ternary: 0 floating-point operations, 25K+ tok/s on FPGA.

Current: ternary weights, sparse matmul (branchless 9.2x), φ-RoPE, STE, packed trits. But activations, attention, gradients = f32.

Goal: Every operation is ternary {-1, 0, +1}. Zero FPU. Pure integer arithmetic.

Dependency Graph

Level 0 (parallel): A, B, C, F, G, H, I  (7 issues)
Level 1 (needs L0):  D (needs B), E (needs D)
Level 2 (needs L1):  J (needs B+C+D+E)
Level 3 (needs L2):  K (needs J), L (needs all)

Sub-Issues

• A feat(hslm): [A] f16 SIMD Vectors — branchless matvec with half precision #330: f16 SIMD Vectors (~200 LOC) — Level 0
• B feat(hslm): [B] Trit Token Encoding — 729 tokens → 6 balanced trits #331: Trit Token Encoding (~100 LOC) — Level 0
• C feat(hslm): [C] Ternary Positional Encoding — multi-scale trit positions #332: Ternary Positional Encoding (~80 LOC) — Level 0
• D feat(hslm): [D] Ternary Activations — STE quantizer + integer matmul #333: Ternary Activations (~200 LOC) — Level 1
• E feat(hslm): [E] Ternary Attention — integer scoring + sparse attend #334: Ternary Attention (~150 LOC) — Level 1
• F feat(hslm): [F] Ternary Gradients / TernGrad — 16x compression #335: Ternary Gradients / TernGrad (~80 LOC) — Level 0
• G feat(hslm): [G] 3-Level Adaptive Sparsity — magnitude pruning #336: 3-Level Adaptive Sparsity (~100 LOC) — Level 0
• H feat(hslm): [H] φ-Scaled Dimensions — golden ratio architecture #337: φ-Scaled Dimensions (~60 LOC) — Level 0
• I feat(hslm): [I] Ternary 3-Phase LR Schedule — φ-decaying cycles #338: Ternary 3-Phase LR Schedule (~60 LOC) — Level 0
• J feat(hslm): [J] Full Ternary Inference Pipeline — 0 float ops #339: Full Ternary Inference Pipeline (~150 LOC) — Level 2
• K feat(hslm): [K] FPGA Verilog Export — full ternary pipeline #340: FPGA Verilog Export (~100 LOC) — Level 3
• L feat(hslm): [L] Integration — model.zig + cli.zig + trainer.zig + sacred_attention.zig #341: Integration model+cli+trainer (~200 LOC) — Level 3

Compiler Fork: #342

Total: ~1,480 LOC new code + 29 tests across 10 new files + 4 edited files

Expected Results

Config	Params	Memory	FPGA DSP	FPU	Speed
Baseline f32	1.95M×32b	7.8 MB	240	yes	1 tok/s
Ternary weights	1.95M×2b	488 KB	0	yes	5K tok/s
+ Trit embed	-175K	485 KB	0	yes	5K tok/s
+ Ternary act	same	488 KB	0	0	15K tok/s
+ Ternary attn	same	488 KB	0	0	20K tok/s
Full ternary	1.7M×2b	425 KB	0	0	25K+ tok/s

Novel claim: "First fully ternary transformer with zero floating-point operations"

New tri CLI Commands

tri hslm benchmark-f16       tri hslm trit-encode
tri hslm trit-pe              tri hslm quantize-act
tri hslm ternary-attn         tri hslm terngrad
tri hslm sparsity             tri hslm phi-scale
tri hslm lr-schedule          tri hslm inference --ternary
tri export --full-ternary

Experiments (after implementation)

Run	Config	Purpose
T1	--trit-embed	Isolate 121x embedding compression
T2	--full-ternary	Full pipeline end-to-end
T3	--ternary-act --threshold 0.5	Isolate activation quantization
T4	--phi-scale --ternary-schedule --cycles 3	φ training dynamics

[gHashTag]

Implementation Complete — 10 New Files, 29 Tests, All Pass

Files Created (Level 0-3)

File	Tests	Status
src/hslm/trit_encoding.zig	5	✅
src/hslm/ternary_position.zig	4	✅
src/hslm/ternary_activations.zig	5	✅
src/hslm/ternary_attention.zig	5	✅
src/hslm/ternary_gradients.zig	4	✅
src/hslm/adaptive_sparsity.zig	5	✅
src/hslm/phi_scaling.zig	6	✅
src/hslm/ternary_schedule.zig	3	✅
src/hslm/ternary_inference.zig	2	✅
src/hslm/ternary_fpga_export.zig	2	✅
Total unique tests	29 (41 with transitive deps)	✅ All pass

Zig Compiler Fork

• Branch feat/vector-float-cast pushed to gHashTag/zig
• Discovery: Zig 0.15 master already supports f16 vector @floatCast natively
• Added 5 f16 vector test cases (were missing in upstream)
• Issue A (f16 SIMD) can proceed without fork workarounds

Remaining: Issue L (Integration)

model.zig, cli.zig, trainer.zig, sacred_attention.zig edits — wiring all components.