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conformance: promote gf256 -> strict SW-bitexact (last rung, 75/0/8) - #1399
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… rung, 75/0/8) gf256 (GoldenFloat256: S1 E97 M158, BIAS=2^96-1, u256_software) promoted from bitexact_selfconsistent to strict bitexact. This closes the last selfconsistent rung of the GoldenFloat ladder; horizon-A SW ceiling reached (75 bit-precise; 8 structural remain terminal, no single decode law; 83/83 SW-bitexact NOT achievable). Bias hold lifted: the 2026-07-05 bias audit resolved the earlier 'open bias R&D' hold (#1386). Decode uses ONLY the closed-form interchange bias 2^(E-1)-1 = 2^96-1 (identical rule to gf128/gf512). The descriptive PHI_BIAS spec metadata is NOT part of the decode path; no decoded value depends on it. Witness chain [verified SW], abs_error=0: - dyadic normalizer (gf_wide_independent_witness.py): 2021/2021 bit-exact - Fraction oracle (conformance/witness/gf256/gf256_decode_ref.py): 2021/2021 exact - cross-check dyadic==Fraction over 201512 representative codes (seed=256): agree - analytic separation-bound (SEPARATION_BOUND.md): M=158>>52 -> no FP lowering, every finite value is an exact dyadic odd*2^k, no rounding. INDEX totals: bitexact 74->75, selfconsistent 1->0, structural 8 (sum=83). NOT on-silicon Tier-E: gf256 is u256_software, has NO RTL; Tier-E ceiling 71/83 (trinity-fpga #199) unaffected. Closes #1397 Refs #1386
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Nothing in bootstrap/src or bootstrap/build.rs uses candle. The two lines came back when bootstrap/Cargo.toml was re-created in #1399, after #980 had already flagged them as dead weight, and a one-sided dependabot bump (#1470) left two candle-core versions in the graph. Clean `cargo build --release -p t27c` on an M1 Pro: 142.7 s -> 97.9 s (110.9 s on a second clean run), 386 -> 279 units. Cargo.lock loses 74 packages; no version changes. `t27c suite` failure set is identical before and after (TOTAL 662, PRIMARY 95, BLOCKED 138). Closes #5899 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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…g#5904) An on_comb parameter becomes a module port only when its width can be derived exactly, and the port is as wide as the input the generated function declares for it (FR-001). One definition decides this -- VerilogCodegen::entry_port_width -- and the entry-points census calls it instead of keeping a private is_sized_primitive list. - Struct ports: a struct whose fields are all strictly sized is a port of the summed field width (no `_ => 32` default). The width is checked against packed_width_in on the same struct map, so port == function input. Nested structs, slices and f32/f64 stay refused. - uN / iN for 1 <= N <= 128 are N bits in ports and type_to_width; type_is_signed accepts iN. - A refusal is reported on stderr as `t27c gen-verilog: ENTRY POINT REFUSED -- <param>: <type>`; the in-file comment and the exit status are unchanged. - A parameterless on_comb is called with W530's 1'b0 placeholder (`on_comb()` failed iverilog). Reachable now that `-> u1` is sized; also fixes d_full_path.t27 and d_static_one.t27, which already failed iverilog on master. Measurements (release t27c, 1174 specs): - ternary_mac + on_comb(acc: i32, a: i8, w: TernaryWeight): NO DATA PORTS 0, `input wire [7:0] w` 1, yosys 222 cells. - led_off_test.t27: ENTRY POINT REFUSED 0, `function [31:0] on_comb` 0; iverilog rc 0, yosys 0 cells (result tied to 1). - slice spec: stderr refusal lines 1, exit 0. - Corpus gen-verilog diff vs master: 8 specs, stderr and exit codes identical for every spec. - Odd widths: igla/training/low_bit_ternary (i2 -> signed [1:0]), numeric/formats (u5, u4 parameters), numeric/gf4 (u4), tri/crypto/base64 (u6 locals), tri/utils/utf8 (u21). - led_off_test no longer refused (u1); d_full_path and d_static_one call on_comb(1'b0). - No corpus on_comb takes a struct. Corpus specs refused: 1 -> 0. - t27c entry-points: FORCED_ROOT 3 -> 7, FORCED_ROOT_WIDE 33 -> 29, FORCED_SCALAR 22 -> 25, FORCED_WIDE 55 -> 52; named-type blockers 105 -> 84; HAS_ENTRY 95, NOPARSE 12, NO_CANDIDATE 469 unchanged. - Seals: 9 files for the 5 odd-width specs resealed with `t27c seal <spec> --save`; check_seal_coverage.py OK (1314 hold). - FROZEN_HASH resealed with `t27c frozen-digest`. - cargo test -p t27c: 2797 passed, 2 failed (the 2 known baseline failures), vs baseline 2789 passed; +6 tests in tests/verilog_struct_entry_ports.rs, +2 entry_points unit tests. gen/verilog/ is a stale snapshot (last regenerated at gHashTag#1399), so it was not regenerated here. Closes gHashTag#5904 Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Promote gf256 -> strict SW-bitexact (74/1/8 -> 75/0/8)
Promotes
gf256(GoldenFloat256: S1 E97 M158, BIAS=2^96-1, u256_software) frombitexact_selfconsistentto strict SW-bitexact. Last selfconsistent rung ofthe GoldenFloat ladder -> horizon-A SW ceiling reached (75 bit-precise; the 8
structural formats are terminal with no single decode law; 83/83 SW-bitexact is NOT
achievable).
Resolves the bias hold (#1386)
Research issue #1386 required resolving the bias-definition before any promotion.
The 2026-07-05 bias audit resolved it: the decode uses ONLY the closed-form
interchange bias
2^(E-1)-1 = 2^96-1(identical rule already applied to gf128 =2^48-1 and gf512 = 2^194-1). The descriptive
PHI_BIASspec metadata is NOT part ofthe decode path; no decoded value depends on it. Decode-definition is definitive.
Witness chain — [verified SW], abs_error=0
gf_wide_independent_witness.pyconformance/witness/gf256/gf256_decode_ref.pySEPARATION_BOUND.mdconformance-integrity-gate(wp18)Two structurally independent exact decode paths (integer normalizer vs
Fraction-significand + symbolic shift) -> genuine second witness. OOM-safe (±2^96
exponent kept symbolic).
Changes
conformance/vectors/INDEX_all_formats.json: gf256bitexact_selfconsistent->bitexact; counts 74/1/8 -> 75/0/8; sha256 + n_vectors updated.conformance/vectors/gf256_conformance_v0.json: promoted pack (2021 dyadic vectors, promoted schema withwitnessesarray).conformance/witness/gf256/{README.md, SEPARATION_BOUND.md, gf256_decode_ref.py, cross_check_representative.py}: new witness dir.docs/NOW.md: promotion entry.Honesty scope
[verified SW]only. gf256 isu256_software(NO RTL) -> no decode-HW/compute-HWcell exists for it; the Tier-E ceiling 71/83 (trinity-fpga #199) is unaffected.
Catalog remains 83 formats. No categorical claims.
Closes #1397
Refs #1386