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…#823) Wave 55 adds ExprConcat: {a, b, c} for Verilog bit concatenation. - Verilog: emits {a, b, c} (native concatenation) - C/Rust: emits /* concat(a, b, c) */ 0 (width-aware shift+or deferred) - Parser distinguishes {expr, expr} from struct literal Name{field: val} - Supports nested concatenation {{a, b}, c} 11 new tests (parse, Verilog, C, Rust, nested, assignment, literals). All pass.
…oses #825) Wave 56 adds ExprTernary: cond ? a : b for concise conditional expressions. - Verilog/C/Zig: emit cond ? a : b (native ternary) - Rust: emit if cond { a } else { b } (idiomatic) - Right-associative: a ? x : b ? y : z parses correctly - Works with comparisons: val < lo ? lo : val 9 new tests (parse, 4 backends, nested, assignment, comparison, right-assoc). All pass.
This was referenced May 24, 2026
This was referenced May 24, 2026
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Закрываю в рамках уборки backlog. Этот PR — часть последовательного стека host-драйвера (Wave 40–98), который был заброшен после 2026-05-24; проект переключился на numeric-SSOT работу (#914–#977). PR конфликтует с master (общие файлы host/mod.rs, main.rs, compiler.rs, docs/NOW.md) и не может быть смержен в исходном виде. При необходимости работу можно переоткрыть и заново отребейзить от master. Ветка сохраняется. |
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Closes #825
Wave 56 — R-CG-5: Ternary conditional operator
cond ? a : bWhat changed
TokenKind::Question+NodeKind::ExprTernary?added to lexer single-char scannercond ? a : bif cond { a } else { b }Example
Test results
9 new tests. All pass.