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t27b: integer types of odd width 1..31 (type u1, i2, u4, u21) (Closes #7368) - #7398
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…7368) A value of an odd-width integer type is held like a u8: in a W register, zero- or sign-extended, and checked against its own range after + - * (ubfx/sbfx and compare). A product of more than 16 bits is formed with umull/smull, so one past 2^32 still traps. ~ on an unsigned odd width flips only its own bits, and << drops the bits that leave the type. A runtime wrap-mode shift amount on an odd width is refused by name. Conformance spec first: specs/tri/t27b/conformance/odd_width_int.t27. Refs #6063. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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October 7, 2026 08:52
Closes #7368) Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Refs #6063. Closes #7368.
What
t27b refused every integer type whose width is not 8, 16, 32 or 64 (
type u1,type i2,type u4,type u21). Zig has an integer of every width and t27c prints the spelling unchanged, so the reference already runs these specs.specs/port/trinity/fpga/openxc7-synth/led_off_test.t27was blocked ontype u1alone.t27b now has an integer type of every width 1..31 other than 8 and 16:
+ - *the result is checked against the type's own range (ubfx/sbfx, then compare). A product of more than 16 bits is formed with umull/smull, so one past 2^32 still traps.~on an unsigned odd width flips only its own bits.<<drops the bits that leave the type, as Zig does; a constant amount is checked against the width, not masked withbits - 1(that mask would turnx << 5on a u21 intox << 4, in eval and codegen alike -- fixed in both).ascasts and enum tag types take odd widths too.Still refused, by name:
ExprBinary(<< >>)):bits - 1is not a mask there.type u48) and 128 and above (type u128..type u1024,type i128): they need register pairs or a multi-limb lowering, later slices of lane 3.Dogfood spec first
specs/tri/t27b/conformance/odd_width_int.t27, 9 tests. Results on the Railway t27c lab:t27c test-report, master t27c): 9 pass, 0 vacuous, 57 runtime asserts. It was run before any Rust was touched.cargo test --release -p t27b --target aarch64-unknown-linux-gnuunder qemu-user on the lab: 14 suites, 125 passed, 0 failed.tests/differential.rsnow runs every binary operator, unary op, widening and cast at the edge values of twelve odd widths (u1, i1, i2, u4, i5, u7, u17, i17, u21, i21, u31, i31), plus every constant shift amount, JIT against eval.Numbers (
t27b corpus specs, Railway t27c lab, aarch64 under qemu-user, both binaries on the branch tree)Every changed verdict:
specs/port/trinity/fpga/openxc7-synth/led_off_test.t27: blocked (type u1) -> pass, 1 test, 1 assert. The reference passes it (t27b lab run e45ba56).specs/tri/t27b/conformance/odd_width_int.t27: new, pass, 57 asserts.specs/igla/race/rtl.t27(type u1->ExprBinary(+)on a string),specs/numeric/gf4.t27(type u4->ExprIdentifier(E::V)),specs/port/trinity/src/brain/weber_tuning.t27(type i2->ExprCall(@abs)),specs/tri/utils/utf8.t27(type u21->type std.mem.Allocator). None of them is in the ledger.The master numbers match the t27b lab's own run on e45ba56 (819 pass, mismatch 0): https://t27b-lab-production.up.railway.app/runs/e45ba566d08f5bb36de304ca7061a202d37d58de.json
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docs/reports/t27b_expectations.json:led_off_test.t27and the new spec move to pass; counts recomputed after the merge with master 05e633d: pass 535, not_pass 24, max_not_pass 24.Foreign-code approval
The owner's standing rule: "add the label yourself and do the foreign part" (translated). The label
owner-approved-foreignis on this PR. The edit touchescli/t27b/src/{ir,codegen,eval,lower}.rsandcli/t27b/tests/differential.rs, each listed intools/policy/foreign-exceptions.txt(new block for #7368 at the top). The spec that will replace this Rust is the t27b port, epic #6198. The AGENTS.md debt line is updated: 15453 plus 7719 lines (+111 and +42).🤖 Generated with Claude Code