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Port gHashTag/trinity:fpga/openxc7-synth/d_static_on.v (Verilog, 1 module) to specs/port/trinity/fpga/openxc7-synth/d_st - #5463
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Create specs/port/trinity/fpga/openxc7-synth/d_static_on.t27 that reproduces the original Verilog module trinity_top with static ON LED output. The original module provides: - input wire clk - output wire led - assign led = 1'b0; // Active-low = ON The T27 module includes: - LedConfig struct for configuration - led_output() function that returns true (static ON) - led_value() function that returns 0 (1'b0 in Verilog) - Tests verifying the behavior matches the original - Validation and invariants for robustness Generated Verilog will have the same module name trinity_top and the LED output behavior is preserved through the combinational functions. Closes #5461
A pull request must add exactly one docs/now entry and a bee has no way to know that: its brief names a boundary file and acceptance criteria, and docs/now/ is neither. The publisher adds it rather than failing the gate. Closes #5461 Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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October 1, 2026 19:13
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Closes #5461
Written by a bee on
queen-5461and published bytools/queen/publish.py. The branch itself is the bee's; the second commit is the coordination entry every pull request must add, which a bee has no way to know about.🤖 Generated with Claude Code