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1. zcu208_4gsps_ofdm zcu208_4gsps_ofdm Public

   OFDM modem (Modem 2) in the FPGA, RFSoC 4x2 / ZCU208: 2 GSPS real time and 4 GSPS in bursts, two boards with independent clocks, dual-polarization receiver, for CFP2-ACO coherent optics. Design not…

2. rfsoc4x2_rdma_ofdm rfsoc4x2_rdma_ofdm Public

   RFSoC 4x2: continuous 2 GSPS I/Q streaming over 100G RoCE v2 (AMD ERNIC) with multi-tile sync, 64 Gb/s to the DACs and from the ADCs at once; OFDM modem on the host CPU. Vivado 2023.2.

   Verilog

3. rfsoc4x2_ernic rfsoc4x2_ernic Public

   100G RDMA (RoCE v2) on RFSoC 4x2 with the AMD ERNIC IP: host RDMA WRITE/READ to PL DDR4 at 98 Gbit/s, byte-exact, Linux rdma-core host

   Verilog

4. rfsoc4x2_mts rfsoc4x2_mts Public

   Bare-metal multi-tile sync on RFSoC 4x2 (JTAG, no PYNQ) + chirp-training skew estimation with sub-sample resolution and sample-accurate alignment: 4 GSPS two-channel loopback, skew ~100 -> -1.00 (M…

   C 1

5. zcu208_dma_5gnr_lwip zcu208_dma_5gnr_lwip Public

   5G NR waveform play/capture and payload transmission on ZCU208 over Ethernet

   C

6. rfsoc4x2_uhd rfsoc4x2_uhd Public

   UHD 4.11 port for the RFSoC 4x2, modelled on the USRP X410/X420/X440: RFNoC FPGA with 100 GbE (Vivado 2023.2), MPM on PetaLinux 2023.2; 4 RX / 2 TX at 500 MS/s, not yet tested on the board

   SystemVerilog