Network-faithful simulation of LLM serving and training deployments
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Updated
Oct 8, 2026 - Python
Network-faithful simulation of LLM serving and training deployments
Early-warning bottleneck profiler for GPU training nodes: GPU + RDMA fabric telemetry with job-level classification
A distributed hardware-software co-design fabric for MoE models (DeepSeek-V3, Mixtral) that eradicates NCCL All-to-All communication stalls via distributed RoCEv2 RDMA virtual address MUX and JAX/XLA SPMD sharding.
Line-rate out-of-band network packet classification & RoCEv2 isolation engine offloaded to SmartNIC/DPU cores.
Packet-level simulator (ns-3 + RoCEv2/DCQCN/PFC/ECN) comparing fat-tree vs rail-optimized topologies for AI training fabrics. Validated against NCCL on real GPUs.
Production-grade High-Frequency Streaming Telemetry Ingestion (TIG Stack: Telegraf, InfluxDB v2, Grafana) & Sub-Second Buffer Incast Inspection for AI Data Center Fabrics (Cisco Nexus Streaming Telemetry aligned).
A simple experiment applying compressible flow principles to soften distributed gradient communication stalls.
Ultra-Ethernet compliance test architecture eliminating expensive HBM memory buffers. Design utilizes FPGAs, PRBS payloads, state hash tables, and virtual RDMA.
Lossless-Ethernet benchmark harness for RoCEv2 fabrics: sweeps queue thresholds, ECN marking, and oversubscription to locate throughput collapse and PFC pressure.
RoCEv2 control plane simulator — DCQCN congestion control on fat-tree GPU clusters with NCCL Ring AllReduce workloads
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