Stochastic Computing for Deep Neural Networks
Design and implementation of RISC-V processor with a pipelined datapath, controller, and hazard unit.
Generating Posit-Based Accelerators With High-Level Synthesis
Code for reproducing CoNGA 2022 results on posit arithmetic operators
Open, bit-reproducible low-precision number format (b-posit / AI-Posit) for AI inference — 30–50% less memory, with results identical to the bit on any GPU, CPU, or RISC-V. Reference + conformance suite + CORE-ET RTL
POPiX: Floating to Fixed-Point Code Generator
Assignment codes for Introduction to Numerical Analysis (2020, FGV-EMAp).
A 32 bit Booth Encoded Wallace Tree Multiplier in Verilog HDL.
Computer Architecture: 01:198:211 This course covers the fundamental issues in the design of modern computer systems, including the design and implementation of key hardware components such as the processor, memory, and I/O devices, and the software/hardware interface.
Design and implementation of RISC-V processor with a multi-cycle datapath and controller.
Code for reproducing CoNGA 2023 results on approximate posit arithmetic
Design and implementation of RISC-V processor with a single-cycle datapath and controller.
Aritmética computacional: conversiones entre binario, decimal y hexadecimal; representación en signo-magnitud, complemento a 2 y estándar de punto flotante IEEE 754. Tecnología en Computadores, Ingeniería Informática.
Float accumulation order alone flips RL reward verdicts and sampler/trainer probabilities — reproduce it on real GPT-2, then remove it with an order-independent reduction. numpy-only, runs in seconds.
Bounded Posits at IEEE Tensor-Core Throughput on Commodity NVIDIA Blackwell, with Bit-Exact Reproducibility
Course Taken @ UCMerced [2021]
Naive x86_64 assembly for big integer arithmetics and generating binary factorial tables
Study of Montgomery Modular Multiplication in Residue Number Systems
Учебный C++ проект по машинной арифметике: перевод чисел между системами счисления, формат IEEE-754 и побитовая реализация сложения, вычитания, умножения и деления для целых и дробных чисел.
Simulations of the following computer arithmetic algorithms: Booth, Booth Radix4, Restoring, Non-Restoring, Radix4 SRT, Radix2 SRT
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