An interactive Ascend-NPU process viewer
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Updated
Oct 10, 2026 - Python
An interactive Ascend-NPU process viewer
RAG for visually rich documents — layout, formula and table structure survive the pipeline. Ported from CUDA to Huawei Ascend NPUs and tested on Ascend 910C.
Ascend NPU fork of nanochat for LLM training with torch_npu/HCCL (experimental)
Native AscendC Mamba2 selective scan / SSD forward-backward custom operator for Huawei Ascend 910B3 and 950PR, with CANN, torch_npu, A100 benchmarks and msprof profiling.
Disaggregated Prefill-Decode serving engine connecting NVIDIA Blackwell (SM120) and Huawei Ascend 910B2 (CANN) across physical nodes.
Out-of-tree HCCL Task DAG and P2P traffic capture studio
Ascend C 算子优化实践:技术文章、可运行示例与实验对照。
Automated GLM interaction detection via CANN, NID scores, and SHAP interaction values for insurance pricing.
A repository to store neural network test code.
MiniMax-H3 昇腾 NPU 本地部署(910B/910C 真机实测):一键脚本 + 40MB/s 分片下载 + 性能实测数据 + 17 条踩坑记录 | MiniMax-H3 local deployment on Ascend NPU, tested on 910B
Ascend NPU (910B / CANN) port of karpathy/nanochat — adds a mid-training stage, a STEM eval suite, and a fast bf16 generation-eval path; training backend of climbmix (unofficial Nemotron-CLIMB reproduction).
Ascend NPU linear-attention operator optimization | GDN eager->AscendC on Qwen3.5-0.8B, 3.45x speedup with verified accuracy alignment
鸿蒙端侧 NPU 实战(麒麟 9010):真实 Qwen 权重在 NPU 上跑通;算子写法差 500 倍(MatMul 549ms → 等价 1x1 Conv 1ms)| HarmonyOS NEXT + HiAI Foundation NPU operators on Kirin 9010
Grab a scarce accelerator slot, run an unattended build/profile pipeline, pull results back, release the slot - scripts for Ascend/CANN cloud dev environments.
A ~2,000-line miniature of vLLM v1 with a vLLM-style Platform/op-family hardware abstraction layer. One engine, four backends: NVIDIA CUDA, Hygon DCU (DTK/HIP), Ascend NPU, Moore Threads MUSA. Real continuous batching, paged KV cache, TP, CUDA graph — runs Qwen3 end-to-end
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