arm64 prep: remove x86-isms from generic multikernel core #8

Part of the arm64 port (see tracking issue). Design: /tmp/multikernel-arm64-design.md summary in the tracking issue.

kernel/multikernel/ and include/linux/multikernel.h are nearly arch-clean already, but a few x86 leaks block a second arch:

• include/linux/multikernel.h:405: #ifdef CONFIG_X86 around mk_arch_pool_chunk_added(), mk_host_park_uses(), mk_teardown_host_park(). Replace with an arch-selected CONFIG_MULTIKERNEL_HOST_PARK (or a HAVE_ symbol) that only x86 selects. On PSCI arm64 there is no host park area, so the stubs are the real implementation.
• Comments and semantics that say "e820" (multikernel.h:591, core.c:1173): the contract is "reserved from the spawn's allocator", not an E820 entry. Reword so the arm64 DTB /reserved-memory path is obviously the same contract.
• The header comment at the bottom of multikernel.h already says the spawn-side arch calls (mk_spawn_cpu, mk_set_spawn_context, mk_e820_fill, mk_alloc_spawn_context) should sit behind mk_arch_spawn_instance(). Do that now: generic code should only call mk_arch_spawn_instance() / mk_arch_release_instance() / mk_arch_confirm_parked().
• Rename mk_register_stop_nmi_handler() to something arch-neutral (mk_arch_register_force_stop()) and keep "may fail" semantics: arm64 may have no SDEI/pseudo-NMI.

No behaviour change on x86; verify with a host+spawn cycle on the existing VM recipe.