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blog: two bitstreams, one bit apart - #886

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Adds one post: Two bitstreams, one bit apart.

A proposed row in the Xilinx bitstream database had been unverifiable since
December 2024; openXC7/prjxray-db#1 was closed on 2026-08-14 pending a fuzzer
that could check it. Two AX7203 bitstreams differing by exactly one bit — frame
0x00401C00, word 50, bit 31 — settle one of the eight on silicon.

The post also covers the BUFR divide ladder measured at four ratios, the two
placer defects that had to be fixed before a pad-fed BUFR could clock fabric on
an xc7a200t at all, and three ways I got it wrong first.

States named exactly, re-checked against the API before writing: #170 and
#171 are OPEN and unmerged, described as submitted upstream; #149 and #172 OPEN;
prjxray-db#1 CLOSED.

openQuestions carries the real limits — one row of eight measured, both
patches unreviewed, an LED that separates a divide of 2/4/8 but not 8 from 7,
the MMCM path still unassemblable, and no independent replication.

Built clean against main (npm run build:ci, exit 0) and the slug resolves in
the emitted Blog-*.js chunk. ru is complete, not partial.

Branched from main in a separate worktree so the unrelated uncommitted work in
the primary checkout was left untouched.

A proposed row in the Xilinx bitstream database had been unverifiable since
December 2024; the pull request carrying it was closed on 2026-08-14 pending a
fuzzer that could check it. Two AX7203 bitstreams differing by exactly one bit
(frame 0x00401C00, word 50, bit 31) settle one of the eight on silicon: with the
bit an LED blinks at 0.75 Hz, without it the counter is frozen.

Also covers the BUFR divide ladder measured at four ratios, the two placer
defects that had to be fixed before a pad-fed BUFR could clock fabric on an
xc7a200t at all, and three ways I got it wrong first -- including a void
experiment whose bitstream carried no enable line, and prior art a code search
found against my own patch after I had already sent it.

openQuestions names what is not proven: one row of eight, both patches OPEN and
unreviewed, an LED that cannot separate a divide of 8 from 7, and no independent
replication.
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gHashTag merged commit c762ac4 into main Sep 1, 2026
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gHashTag deleted the blog/two-bitstreams-one-bit-apart branch September 1, 2026 16:22
github-actions Bot added a commit that referenced this pull request Sep 1, 2026
blog: two bitstreams, one bit apart (#886)

A proposed row in the Xilinx bitstream database had been unverifiable since
December 2024; the pull request carrying it was closed on 2026-08-14 pending a
fuzzer that could check it. Two AX7203 bitstreams differing by exactly one bit
(frame 0x00401C00, word 50, bit 31) settle one of the eight on silicon: with the
bit an LED blinks at 0.75 Hz, without it the counter is frozen.

Also covers the BUFR divide ladder measured at four ratios, the two placer
defects that had to be fixed before a pad-fed BUFR could clock fabric on an
xc7a200t at all, and three ways I got it wrong first -- including a void
experiment whose bitstream carried no enable line, and prior art a code search
found against my own patch after I had already sent it.

openQuestions names what is not proven: one row of eight, both patches OPEN and
unreviewed, an LED that cannot separate a divide of 8 from 7, and no independent
replication.
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