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feat(spec): BitNet×GF-T inference neuron + signed GF-T dot4 (Refs #1764) - #1795
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specs/ternary/gft_bitnet_neuron.t27: the BitNet x GF-T inference
primitive -- a neuron with ternary weights {-1,0,+1} and real-valued
GF-T16 activations. Each trit weight selects +a / 0 / -a of its GF-T
activation; the four signed contributions are summed in signed GF-T
(round-to-nearest-even, zero-aware). Fuses the two project threads.
Bit-exact to the oracle over 3000 vectors; yosys synth_xilinx ->
9763 LUT + 1320 CARRY4 (synthesizes to Artix-7).
specs/ternary/gft_signed_dot4.t27: a signed GF-T16 4-term MAC (real-
valued matmul tile with negatives + cancellation), bit-exact to the
oracle balanced tree over 3000 vectors.
Synthesis finding: a bounded `while` loop inside a Verilog function is
NOT yosys-synthesizable; the signed subtract's left-normalization was
rewritten flat (12 conditional shifts), re-verified 3000 vectors.
Bitstream (nextpnr) remains owner-gated.
No compiler change (uses on_comb); 1535 unit tests pass.
Refs #1764
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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PR DashboardGenerated at: 2026-08-06 14:24:07 UTC
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Refs #1764
Two spec-first increments fusing the project's two threads (BitNet ternary + GF-T format), both bit-exact to the ideal oracle
gft16_ref.pyand synthesizable. No compiler change (useson_comb).BitNet×GF-T neuron —
specs/ternary/gft_bitnet_neuron.t27A neuron with ternary weights {-1,0,+1} and real-valued GF-T16 activations — the actual BitNet inference pattern with wide dynamic range. Each trit weight selects
+a / 0 / -aof its GF-T activation; the four signed contributions are summed in signed GF-T (RNE, zero-aware).Signed GF-T dot4 —
specs/ternary/gft_signed_dot4.t27A signed GF-T16 4-term MAC (real-valued matmul tile with negatives + cancellation), bit-exact to the oracle balanced tree over 3000 vectors.
Synthesis finding
A bounded
whileloop inside a Verilog function is not yosys-synthesizable ("Function can only be called with constant arguments"). The signed subtract's left-normalization was rewritten as a flat unrolled sequence (12 conditional shifts, ≥ the ~9 max) — functionally identical (re-verified 3000 vectors), now synthesizable. Bitstream/place-and-route (nextpnr) remains owner-gated (not installed locally).1535 unit tests pass.
🤖 Generated with Claude Code