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fix(gen-verilog): hoist function-local reg decls to body top (#1741) - #1744
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gen-verilog emitted local reg declarations at their point of declaration -- after preceding statements and inside while-loop blocks -- which Verilog forbids (iverilog: syntax error). Recursively collect every function-body local and hoist its declaration to the top of the begin:<fn>_body block, then emit each StmtLocal as assignment-only (Init phase). Verified: the loop-form ternary dot product (while + locals) now iverilog- compiles and bit-exact cross-checks vs trit27_dot_product on 300 random vectors; new regression test tests/verilog_decl_hoist.rs; full compiler suite green (excl. pre-existing #1726). FROZEN_HASH re-sealed. Closes #1741 Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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gen-verilog emitted function-local
regdeclarations at their point of declaration — after preceding statements and insidewhile-loop blocks — which Verilog forbids (iverilog:syntax error / Malformed statement). This blocked any non-trivial spec-first hardware with loops or multiple locals; the spec-first ternary MAC (#1743) had to route around it with a 27-term loop-free form.Closes #1741
Fix
Recursively collect every function-body local (
collect_fn_local_decls, deduped by binding name) and hoist itsregdeclaration to the top of thebegin : <fn>_bodyblock, then emit eachStmtLocalas assignment-only (Init phase) via ahoist_fn_localsflag. A reg declared inside a loop is declared once at the top and reassigned each iteration — semantically identical.Verification
while+ locals) now iverilog-compiles and bit-exact cross-checks vstrit27_dot_producton 300 random vectors (ALL_MATCH).tests/verilog_decl_hoist.rs(asserts hoisting + iverilog elaboration; skips without iverilog).bitnet_topreds (test: bitnet_top asserts stale contract (busy + mem tie-off) vs current gen-bitnet-engine-top #1726).Note: this changes gen-verilog output only for specs that currently emit invalid Verilog (interleaved/loop-nested decls); decls-first specs are unaffected (hoisting is a no-op). If
validateflags any spec seals, they will be re-sealed in this PR.🤖 Generated with Claude Code