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fix(gen-verilog): hoist function-local reg decls to body top (#1741) - #1744

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fix/verilog-hoist-fn-locals
Aug 5, 2026
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fix/verilog-hoist-fn-locals

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@gHashTag gHashTag commented Aug 5, 2026

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gen-verilog emitted function-local reg declarations at their point of declaration — after preceding statements and inside while-loop blocks — which Verilog forbids (iverilog: syntax error / Malformed statement). This blocked any non-trivial spec-first hardware with loops or multiple locals; the spec-first ternary MAC (#1743) had to route around it with a 27-term loop-free form.

Closes #1741

Fix

Recursively collect every function-body local (collect_fn_local_decls, deduped by binding name) and hoist its reg declaration to the top of the begin : <fn>_body block, then emit each StmtLocal as assignment-only (Init phase) via a hoist_fn_locals flag. A reg declared inside a loop is declared once at the top and reassigned each iteration — semantically identical.

Verification

  • Root cause confirmed with minimal cases: decl-after-statement fails in any block; decl-first is fine.
  • The loop-form ternary dot product (while + locals) now iverilog-compiles and bit-exact cross-checks vs trit27_dot_product on 300 random vectors (ALL_MATCH).
  • New regression test tests/verilog_decl_hoist.rs (asserts hoisting + iverilog elaboration; skips without iverilog).
  • Full compiler test suite green apart from the pre-existing, unrelated bitnet_top reds (test: bitnet_top asserts stale contract (busy + mem tie-off) vs current gen-bitnet-engine-top #1726).
  • FROZEN_HASH re-sealed.

Note: this changes gen-verilog output only for specs that currently emit invalid Verilog (interleaved/loop-nested decls); decls-first specs are unaffected (hoisting is a no-op). If validate flags any spec seals, they will be re-sealed in this PR.

🤖 Generated with Claude Code

gen-verilog emitted local reg declarations at their point of declaration --
after preceding statements and inside while-loop blocks -- which Verilog
forbids (iverilog: syntax error). Recursively collect every function-body
local and hoist its declaration to the top of the begin:<fn>_body block,
then emit each StmtLocal as assignment-only (Init phase).

Verified: the loop-form ternary dot product (while + locals) now iverilog-
compiles and bit-exact cross-checks vs trit27_dot_product on 300 random
vectors; new regression test tests/verilog_decl_hoist.rs; full compiler
suite green (excl. pre-existing #1726). FROZEN_HASH re-sealed.

Closes #1741

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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PR Dashboard

Generated at: 2026-08-05 18:57:14 UTC

Summary

Status Count
Total Open PRs 50
PRs with Failing Checks 0
PRs with All Checks Green 50
READY 0
FAILING 0
PENDING 0

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=d3040b34fd3a != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

@gHashTag
gHashTag merged commit ab6975c into master Aug 5, 2026
26 of 28 checks passed
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gHashTag deleted the fix/verilog-hoist-fn-locals branch August 5, 2026 18:58
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gen-verilog: local reg decls emitted after statements / inside while loops (iverilog-rejected)

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