Skip to content

feat(ring-4): module + use → Zig imports [SEED-4] - #12

Merged
gHashTag merged 1 commit into
masterfrom
ring/4-module-use
Apr 4, 2026
Merged

gHashTag merged 1 commit into
masterfrom
ring/4-module-use

Conversation

@gHashTag

@gHashTag gHashTag commented Apr 4, 2026

Copy link
Copy Markdown
Owner

Closes #7

Summary

  • Module names now appear in generated Zig header comments
  • use X::Y; statements generate const Y = @import("Y.zig"); in Zig output
  • Simple use name; statements also supported
  • Added UseDecl AST node kind for proper representation
  • All 28 specs gen successfully with 0 failures
  • 67 total @import statements generated across all specs

Changes

  • bootstrap/src/compiler.rs: Added UseDecl to NodeKind, parse use statements into AST nodes instead of skipping, emit @import in codegen

SEED Layer Complete

All 5 seed rings (0-4) are sealed:

  • ring-0: frozen stage-0, first parse
  • ring-1: lex all 28 specs
  • ring-2: type declarations → Zig
  • ring-3: fn signatures → Zig
  • ring-4: module + use → Zig imports

phi^2 + 1/phi^2 = 3 | TRINITY

module declarations appear as header comments.
use statements generate @import in Zig output.
SEED layer complete (rings 0-4).

Closes #7

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
@gHashTag
gHashTag merged commit 30138c4 into master Apr 4, 2026
1 check passed
@gHashTag
gHashTag deleted the ring/4-module-use branch April 4, 2026 10:09
gHashTag added a commit that referenced this pull request Jun 1, 2026
feat(ring-4): module + use → Zig imports [SEED-4]
gHashTag added a commit that referenced this pull request Aug 8, 2026
…ons exhausted (Refs #1764) (#1907)

* docs: MMCM places but is dead on silicon -> open-flow structural options exhausted (Refs #1764)

Tested the last structural lever: regenerate the 200 MHz clock through the
MMCM/CMT tree to probe the global clock-skew hypothesis. MMCME2_BASE places in
nextpnr and the fasm builds, but the flashed bitstream is dead on the AX7203
(no UART response, 4 seeds, with/without BUFG on the MMCM output) -- the open
flow does not emit MMCM config bits, so it never locks. MMCM is placement-only
on openXC7, not functional. So the open-toolchain structural options are
exhausted (11 local fixes + MMCM); only commercial P&R can close timing or
give a working MMCM. Seed-search is final on the open flow. Added ruled-out
#12.

Refs #1764

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

* docs: reconcile stale 'pipeline is the fix' bullet with the disproof (#10) (Refs #1764)

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>

---------

Co-authored-by: Claude Opus 4.8 <noreply@anthropic.com>
gHashTag added a commit that referenced this pull request Oct 10, 2026
…logues from a64 sub_const (Closes #8758) (#8764)

lexer.t27's next_token keeps about fifty 64 KiB Lexer values in one frame,
3344848 bytes, and t27b refused it as FnDecl(frame size) under a 1 MiB cap
(see #7367). The cap was a policy number, not an encoding limit.

- specs/tri/t27b/a64.t27: sub_const_len / sub_const_at, the sequence that
  subtracts a constant from a register (one SUB, or SUB #hi, LSL #12 then
  SUB #lo, as LLVM splits a frame offset), and SUB_CONST_REACH = 2^24.
- cli/t27b/src/codegen.rs: slot_addr and the unprobed prologue use it; the
  cap is SUB_CONST_REACH - 16. Hand lines +7 -17, tests/source.rs +2 -2.
- New conformance spec big_frame.t27 (5 tests, frames past 1 MiB, far-end
  loads and stores, a 10000-byte two-SUB prologue).
- Ledger: lexer.t27 codegen -> pass, big_frame.t27 pass, max_not_pass 11 -> 10.

Co-authored-by: Claude <claude@anthropic.com>
Co-authored-by: Claude Opus 5.5 <noreply@anthropic.com>
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

[SEED-4] Ring-4: module + use — import system gen to Zig

2 participants