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RyuJIT: Recognize BLSR in "x & (x-1)" #63286

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@EgorBo

Found in #63285, the following pattern:

int Foo(int x) => x & (x - 1);

has this codegen on x86/64:

lea      eax, [rdx-1]
and      eax, edx

Expected codegen:

blsr     eax, edx

Should be pretty straightforward to implement in lowerxarch.cpp by replacing AND(X, SUB(X, 1) with HWINTRINSIC ResetLowestSetBit (X), leaving it here for anyone who is interested in contributing to RyuJIT.

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    area-CodeGen-coreclrCLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMIgood first issueIssue should be easy to implement, good for first-time contributorshelp wanted[up-for-grabs] Good issue for external contributorstenet-performancePerformance related issue

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