test+docs(perf): Phase 2.11 Go benchmarks (path A)

[zzylol]

Summary

• Adds testing.B benchmarks for Precompute.Observe(*Observation) ns/op across the 5 sketch types in asap-precompute-go, plus shim-level benchmarks per processor (processor_bench_test.go in each of the 5 sketch processors).
• Runs them on commit 6b3258d (pre-shim baseline, last commit before PRs refactor(kllprocessor): thin shim delegating to asap-precompute-go (Phase 2 step 2.6) #226–refactor(countminsketchprocessor): thin shim delegating to asap-precompute-go (Phase 2 step 2.9) #230) vs f9824e2 (post-shim HEAD) and verifies every sketch sits well within the ADR-0002 §"Performance contract" 10% gate.
• docs/phase-2-perf-bench-go.md documents methodology, hardware/Go version, raw benchstat output, per-processor shim numbers (informational, no pre-shim equivalent), and the verdict per sketch.

Methodology

• Hardware: AMD Ryzen Threadripper PRO 5955WX 16-Cores, Linux 5.15
• Toolchain: go1.25.3 linux/amd64, golang.org/x/perf/cmd/benchstat
• count=5, b.ReportAllocs(), deterministic PRNG seed, no -race
• Bench file is portable across 6b3258d and HEAD: defines tiny inline wrappers around sketchlib-go rather than depending on the post-shim-only sketches/ subpackage. Same source applies to both commits, isolating the measurement to the runtime's Observe path.
• 1h window so the bench loop never rotates; pure per-observation timings.

cd asap-precompute-go
go test -bench=. -benchmem -count=5 -run=^$ . > /tmp/asap-pre.txt   # at 6b3258d
go test -bench=. -benchmem -count=5 -run=^$ . > /tmp/asap-post.txt  # at HEAD
benchstat /tmp/asap-pre.txt /tmp/asap-post.txt

Results — asap-precompute-go::Observe (the 10% gate)

Median of 5 samples per benchmark.

Sketch	Pre (ns/op)	Post (ns/op)	Δ%	Gate
DDSketch	158.10	155.80	−1.45%	PASS
KLL	288.40	290.60	+0.76%	PASS
HLL	146.60	147.70	+0.75%	PASS
CountSketch	241.00	240.50	−0.21%	PASS
CountMinSketch	345.20	351.90	+1.94%	PASS

benchstat flagged none of the deltas as statistically significant (every p > 0.2 at n=5). Allocations bit-identical pre vs post (24/81/24/32/128 B/op, 2/4/2/3/5 allocs/op).

Per-processor shim baseline (informational)

Median of 5 samples on a 1000-data-point synthetic batch, post-shim only:

Processor	Bench	ns/op	B/op	allocs/op
ddsketch	ProcessMetrics (window, observe-only)	552,704	355,116	5,002
ddsketch	ProcessBatch (batch)	867,072	572,606	10,167
kll	ProcessBatch	737,000	450,199	10,113
hll	ProcessBatch	783,714	798,082	7,202
countsketch	ProcessMetrics (batch)	1,209,997	711,312	10,160
countminsketch	ProcessBatch	2,158,571	2,108,229	18,312

Overall verdict

All five sketches PASS the ADR-0002 §"Performance contract" 10% gate. No regression to investigate; nothing to escalate. The shim refactor (PRs #226–#230) preserves per-observation latency to within ±2% at single-machine bench scale.

Test plan

• go test -bench=. -benchmem -count=5 -run=^$ . succeeds on asap-precompute-go at both commits
• go test -bench=. -benchmem -count=5 -run=^$ . succeeds in each of the 5 processor/<sketch>processor/ packages at HEAD
• benchstat /tmp/asap-pre.txt /tmp/asap-post.txt shows every Δ inside ±2% with p > 0.2 (n=5)
• No source code modified outside the new bench / doc files
• No submodule pointer drift in the commit
• Pre-existing unit tests still pass (one prior TestCSDelta_MultipleWindowsConvergence failure on countsketchprocessor reproduces with our bench file removed — not introduced here)

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