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Add H200 profiling tables - #46

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fwyc0573 merged 5 commits into
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data-h200-profiling
Oct 14, 2026
Merged

fwyc0573 merged 5 commits into
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data-h200-profiling

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Summary

H200 profiling tables in the per-model layout of data/profiling/compute/h800/ and rtx_pro_6000/: one directory per model, with TP and EP as row attributes. Paths follow the default templates, so a run with --replica_config_device h200 --replica_config_network_device h200_dgx needs no table flags.

  • data/profiling/compute/h200/llama2_7b_dense_example/: linear_op, attention, their kernel-only tables, kernel_gap.
  • data/profiling/compute/h200/Qwen3-30B-A3B-tiny/: the same plus moe and moe_kernel_only.
  • data/profiling/compute/h200/Qwen3-235B-A22B/: the TP8 / EP1 and TP2 / EP4 table sets joined. Attention, MoE and CPU rows are disjoint by TP / EP; the 387 TP=1 linear-op rows measured in both sets keep the TP8 set's measurement. kernel_gap.csv holds a TP8 and a TP2 row per execution mode (needs the TP column of the base PR).
  • data/profiling/cpu_overhead/h200_dgx/<MODEL>/: one serving layout per model. llama2_7b_dense_example: co-location TP1. Qwen3-30B-A3B-tiny: PD-disaggregation TP1. Qwen3-235B-A22B: co-location TP8 and TP2.

Each commit stays under GitHub's 100 MB push limit (57.1, 69.1, 65.6, 58.0 and 0.2 MB of new blobs); the largest file is 65.6 MB.

Checks

  • Default paths: a llama2_7b_dense_example co-location run on H200 with no table flags reads every table from data/profiling/, applies the kernel gap (eager 1.746 us, cuda_graph 0.394 us) and trains its CPU-overhead models. 4 requests of 128 prefill / 8 decode tokens read TTFT 27.059 ms, TPOT 26.697 ms (a path check; no vLLM reference).
  • Qwen3-235B-A22B: a TP8 co-location run on the joined tables writes metrics byte-identical to a run on its own tables (TTFT mean 157.979 ms). A TP2 / EP4 / DP2 / PP2 run reads TTFT mean 439.729 ms against 439.110 ms on its own tables (+0.619 ms), TPOT mean 199.007 against 199.004 ms; the difference comes from the shared TP=1 linear-op rows.

Linear-op, attention and kernel-gap tables measured on NVIDIA H200 at TP1,
eager and kernel-only (CUDA-event) families, in the per-model layout of the
other devices. These are the tables the E2E calibration against vLLM 0.10.2
priced its dense co-location and PDD cases with.
Linear-op, attention, MoE and kernel-gap tables measured on NVIDIA H200 at
TP1, with MoE rows at EP1 and EP2, eager and kernel-only families. These are
the tables the E2E calibration priced its tiny-MoE PDD and DP/PP co-location
cases with.
Attention rows measured on NVIDIA H200 at TP8 and TP2, the attention TP sizes
of the two Qwen3-235B-A22B serving layouts of the E2E calibration. The table
is committed alone so that each commit stays below 100 MB.
Kernel-only attention, linear-op, MoE and kernel-gap tables measured on
NVIDIA H200 for the TP8/EP1 and TP2/DP2/EP4/PP2 serving layouts, joined into
one per-model set: rows are told apart by their TP and EP columns. Both
layouts' runs measured the TP1 linear-op rows; the set keeps the TP8 run's,
following the merge rule that an earlier measurement of a row stays.
Host-time tables (h200_dgx) built from vLLM 0.10.2 CPU-probe runs. The
predictor selects their rows by model and TP size only, so each model holds
one serving layout: llama2_7b_dense_example co-location at TP1,
Qwen3-30B-A3B-tiny PDD at TP1, and Qwen3-235B-A22B co-location at TP8 and at
TP2/DP2/PP2.
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