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[JitDiff X64] [Daniel-Svensson] Add mulx support to Math.BigMul #2149

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[JitDiff X64] [Daniel-Svensson] Add mulx support to Math.BigMul#2149

Description

@MihuBot
MihuBot
opened on Sep 4, 2026

Job completed in 21 minutes 51 seconds (remote runner delay: 52 seconds).
dotnet/runtime#128787
Using arguments: -nuget
Main commit: dotnet/runtime@de29e26
PR commit: Daniel-Svensson/runtime@269b382

Diffs

Diffs 
Found 112 files with textual diffs.

Summary of Code Size diffs:
(Lower is better)

Total bytes of base: 409592118
Total bytes of diff: 409591734
Total bytes of delta: -384 (-0.00 % of base)
Total relative delta: -0.23
    diff is an improvement.
    relative diff is an improvement.


Total byte diff includes -19 bytes from reconciling methods
	Base had    1 unique methods,       19 unique bytes
	Diff had    0 unique methods,        0 unique bytes

Top file regressions (bytes):
         133 : System.IO.Hashing.dasm (0.34 % of base)
          36 : HotChocolate.Types.dasm (0.00 % of base)

Top file improvements (bytes):
        -395 : System.Private.CoreLib.dasm (-0.00 % of base)
         -82 : System.Runtime.Numerics.dasm (-0.03 % of base)
         -57 : System.Linq.dasm (-0.00 % of base)
         -19 : SixLabors.ImageSharp.dasm (-0.00 % of base)

6 total files with Code Size differences (4 improved, 2 regressed), 754 unchanged.

Top method regressions (bytes):
          38 (3.07 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength129To240(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
          35 (3.54 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
          30 (4.08 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength17To128(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
          22 (3.04 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength0To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
          21 (3.69 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength17To128(ptr,uint,ulong):ulong (FullOpts)
          20 (9.57 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
          18 (1.11 % of base) : HotChocolate.Types.dasm - HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
          18 (1.11 % of base) : HotChocolate.Types.dasm - HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
          13 (2.28 % of base) : System.Private.CoreLib.dasm - System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
          13 (2.28 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
          10 (1.10 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Divide(byref,byref,int,byref) (FullOpts)
          10 (1.18 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ReduceFractionNegative(System.UInt128,int,System.Span`1[ulong]) (FullOpts)
           9 (1.66 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecMul(byref,byref) (FullOpts)
           9 (3.96 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator+InvariantDivisor:.ctor(nuint):this (FullOpts)
           7 (0.97 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:DivideInvariant(System.ReadOnlySpan`1[nuint],System.Numerics.BigIntegerCalculator+InvariantDivisor,int,System.Span`1[nuint],byref) (FullOpts)
           6 (0.29 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Pow(System.Number+DiyFp128,System.Number+DiyFp128):System.Number+DiyFp128 (FullOpts)
           5 (29.41 % of base) : System.Private.CoreLib.dasm - System.Int128:System.IBinaryIntegerParseAndFormatInfo<System.Int128>.MultiplyBy10(System.Int128):System.Int128 (FullOpts)
           5 (31.25 % of base) : System.Private.CoreLib.dasm - System.Int128:System.IBinaryIntegerParseAndFormatInfo<System.Int128>.MultiplyBy16(System.Int128):System.Int128 (FullOpts)
           5 (21.74 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
           5 (0.80 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:TryMultiplyRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
           5 (29.41 % of base) : System.Private.CoreLib.dasm - System.UInt128:System.IBinaryIntegerParseAndFormatInfo<System.UInt128>.MultiplyBy10(System.UInt128):System.UInt128 (FullOpts)
           5 (31.25 % of base) : System.Private.CoreLib.dasm - System.UInt128:System.IBinaryIntegerParseAndFormatInfo<System.UInt128>.MultiplyBy16(System.UInt128):System.UInt128 (FullOpts)
           4 (0.71 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecMod(byref,byref) (FullOpts)
           4 (3.33 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:Mix32Bytes(byref,byref,ptr,ptr,ulong,ulong,ulong,ulong,ulong) (FullOpts)
           3 (0.69 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecFromFloat[double](double,byref) (FullOpts)
           3 (0.63 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ExpReduce(byref,byref,ulong,ulong,int,byref):int (FullOpts)
           2 (16.67 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:IncreaseScale64(byref,uint) (FullOpts)
           2 (1.07 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarCyFromDec(byref):long (FullOpts)
           2 (1.32 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength4To8(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
           2 (7.69 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:Multiply64To128(ulong,ulong,byref):ulong (FullOpts)
           2 (20.00 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:Multiply64To128ThenFold(ulong,ulong):ulong (FullOpts)
           2 (7.69 % of base) : System.Private.CoreLib.dasm - System.Math:BigMul(ulong,ulong,byref):ulong (FullOpts)
           2 (28.57 % of base) : System.Private.CoreLib.dasm - System.Math:BigMul(ulong,ulong):System.UInt128 (FullOpts)
           2 (20.00 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128MultiplyHigh(ulong,ulong):ulong (FullOpts)
           2 (7.69 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMul(ulong,ulong,byref,byref) (FullOpts)
           2 (4.88 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulAdd(ulong,ulong,ulong,byref,byref) (FullOpts)
           2 (4.88 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulXAdd(ulong,ulong,ulong,ulong,byref,byref) (FullOpts)
           2 (2.00 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulXAddC(ulong,ulong,ulong,ulong,byref,byref,byref) (FullOpts)
           2 (1.87 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulXAddCwCarryIn(ulong,ulong,ulong,ulong,ulong,byref,byref,byref) (FullOpts)
           2 (2.74 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator+InvariantDivisor:DivRem(nuint,byref):nuint:this (FullOpts)
           2 (28.57 % of base) : System.Private.CoreLib.dasm - System.Runtime.Intrinsics.X86.X86Base+X64:BigMul(ulong,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
           2 (28.57 % of base) : System.Private.CoreLib.dasm - System.UInt64:BigMul(ulong,ulong):System.UInt128 (FullOpts)
           2 (7.69 % of base) : System.Private.CoreLib.dasm - System.UIntPtr:BigMul(nuint,nuint,byref):nuint (FullOpts)
           1 (0.06 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[long]:SampleToList(System.Collections.Generic.IEnumerable`1[long],int,byref):System.Collections.Generic.List`1[long] (FullOpts)
           1 (0.06 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[short]:SampleToList(System.Collections.Generic.IEnumerable`1[short],int,byref):System.Collections.Generic.List`1[short] (FullOpts)
           1 (0.19 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:MontgomeryReduce(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):int (FullOpts)

Top method improvements (bytes):
         -64 (-28.44 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecCmpSub(byref,byref):int (FullOpts)
         -42 (-6.92 % of base) : System.Private.CoreLib.dasm - System.Numerics.BigIntegerCalculator:MulAdd1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -42 (-6.92 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:MulAdd1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -38 (-21.23 % of base) : System.Private.CoreLib.dasm - System.Number:ComputeProductApproximation(int,long,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
         -32 (-2.25 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:DecAddSub(byref,byref,bool) (FullOpts)
         -31 (-6.98 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength0To16(ptr,uint,ulong):ulong (FullOpts)
         -30 (-21.58 % of base) : System.Private.CoreLib.dasm - System.UInt128:BigMul(System.UInt128,System.UInt128,byref):System.UInt128 (FullOpts)
         -25 (-6.79 % of base) : System.Private.CoreLib.dasm - System.UInt128:<DivRem>g__DivideSlow|83_0(System.UInt128,System.UInt128):System.ValueTuple`2[ulong,System.UInt128] (FullOpts)
         -23 (-4.89 % of base) : System.Private.CoreLib.dasm - System.Numerics.BigIntegerCalculator:Mul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -23 (-4.89 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:Mul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -21 (-2.20 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128EvaluatePositivePolynomial(byref,long,System.ReadOnlySpan`1[System.Number+DiyFp128FixedCoefficient],int,long,byref) (FullOpts)
         -19 (-100.00 % of base) : SixLabors.ImageSharp.dasm - SixLabors.ImageSharp.Memory.ByteMemoryOwner`1[double]:get_Memory():System.Memory`1[double]:this (FullOpts) (1 base, 0 diff methods)
         -16 (-5.10 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ReduceBuildInteger(System.UInt128,int,System.Span`1[ulong]):int (FullOpts)
         -15 (-9.43 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:Div128By96(byref,byref):uint (FullOpts)
         -15 (-2.52 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:PowCore(nuint,System.ReadOnlySpan`1[nuint],nuint,nuint):nuint (FullOpts)
         -15 (-6.52 % of base) : System.Private.CoreLib.dasm - System.Random+XoshiroImpl:NextInt64(long,long):long:this (FullOpts)
         -14 (-41.18 % of base) : System.Private.CoreLib.dasm - System.Int128:op_Multiply(System.Int128,System.Int128):System.Int128 (FullOpts)
         -14 (-25.45 % of base) : System.Private.CoreLib.dasm - System.Int128:System.Numerics.INumberBase<System.Int128>.MultiplyAddEstimate(System.Int128,System.Int128,System.Int128):System.Int128 (FullOpts)
         -14 (-41.18 % of base) : System.Private.CoreLib.dasm - System.UInt128:op_Multiply(System.UInt128,System.UInt128):System.UInt128 (FullOpts)
         -14 (-25.45 % of base) : System.Private.CoreLib.dasm - System.UInt128:System.Numerics.INumberBase<System.UInt128>.MultiplyAddEstimate(System.UInt128,System.UInt128,System.UInt128):System.UInt128 (FullOpts)
         -13 (-7.34 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:MergeAccumulators(ptr,ptr,ulong):ulong (FullOpts)
         -13 (-4.30 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:GetPowBitLengthBounds(int,int,int,int,int):System.ValueTuple`2[ulong,ulong] (FullOpts)
         -12 (-0.77 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[byte]:SampleToList(System.Collections.Generic.IEnumerable`1[byte],int,byref):System.Collections.Generic.List`1[byte] (FullOpts)
         -12 (-0.77 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[double]:SampleToList(System.Collections.Generic.IEnumerable`1[double],int,byref):System.Collections.Generic.List`1[double] (FullOpts)
         -12 (-0.77 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[int]:SampleToList(System.Collections.Generic.IEnumerable`1[int],int,byref):System.Collections.Generic.List`1[int] (FullOpts)
         -12 (-4.71 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ExtendedMultiply(byref,byref,byref,byref) (FullOpts)
         -12 (-1.50 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:TryMultiplyShiftedRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
         -12 (-8.16 % of base) : System.Private.CoreLib.dasm - System.UInt128:<DivRem>g__Divide96BitsBy64Bits|83_3(ulong,uint,ulong):System.ValueTuple`2[uint,ulong] (FullOpts)
         -11 (-15.49 % of base) : System.Runtime.Numerics.dasm - System.Number:<NumberToBigInteger>g__MultiplyAdd|18_4(System.Span`1[nuint],nuint,nuint):nuint (FullOpts)
         -10 (-8.33 % of base) : System.Private.CoreLib.dasm - System.Int128:op_Modulus(System.Int128,System.Int128):System.Int128 (FullOpts)
          -8 (-24.24 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:IncreaseScale(byref,uint) (FullOpts)
          -8 (-22.22 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:IncreaseScale(byref,uint):uint (FullOpts)
          -8 (-0.38 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[System.__Canon]:SampleToList(System.Collections.Generic.IEnumerable`1[System.__Canon],int,byref):System.Collections.Generic.List`1[System.__Canon] (FullOpts)
          -8 (-0.46 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[System.Numerics.Vector`1[float]]:SampleToList(System.Collections.Generic.IEnumerable`1[System.Numerics.Vector`1[float]],int,byref):System.Collections.Generic.List`1[System.Numerics.Vector`1[float]] (FullOpts)
          -8 (-3.69 % of base) : System.Private.CoreLib.dasm - System.Random+ImplBase:NextUInt64(ulong,System.Random+XoshiroImpl):ulong (FullOpts)
          -8 (-2.30 % of base) : System.Private.CoreLib.dasm - System.Random+ThreadSafeRandom:NextInt64(long):long:this (FullOpts)
          -8 (-3.69 % of base) : System.Private.CoreLib.dasm - System.Random+XoshiroImpl:NextInt64(long):long:this (FullOpts)
          -7 (-0.44 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[System.Nullable`1[int]]:SampleToList(System.Collections.Generic.IEnumerable`1[System.Nullable`1[int]],int,byref):System.Collections.Generic.List`1[System.Nullable`1[int]] (FullOpts)
          -7 (-1.96 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ReduceFractionPositive(System.ReadOnlySpan`1[ulong],System.Span`1[ulong]) (FullOpts)
          -7 (-1.98 % of base) : System.Private.CoreLib.dasm - System.Number:TryRoundToDecimalDigitsViaInteger(double,int,int,byref):bool (FullOpts)
          -6 (-4.41 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Multiply(byref,byref,byref) (FullOpts)
          -6 (-1.72 % of base) : System.Private.CoreLib.dasm - System.Random+ThreadSafeRandom:NextInt64(long,long):long:this (FullOpts)
          -5 (-6.49 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Pow5(int):System.UInt128 (FullOpts)
          -5 (-1.11 % of base) : System.Private.CoreLib.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
          -4 (-0.22 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecDiv(byref,byref) (FullOpts)
          -4 (-4.08 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength9To16(ptr,uint,ulong):ulong (FullOpts)
          -3 (-2.14 % of base) : System.Private.CoreLib.dasm - System.Int128:DivRem(System.Int128,System.Int128):System.ValueTuple`2[System.Int128,System.Int128] (FullOpts)
          -3 (-2.52 % of base) : System.Private.CoreLib.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)
          -2 (-0.27 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128EvaluateNegativePolynomial(byref,long,System.ReadOnlySpan`1[System.Number+DiyFp128FixedCoefficient],int,long,byref) (FullOpts)
          -2 (-0.91 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:PowCore(nuint,nuint,nuint,nuint):nuint (FullOpts)
          -1 (-0.35 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:<Square>g__Naive|120_2(System.ReadOnlySpan`1[nuint],System.Span`1[nuint]) (FullOpts)

Top method regressions (percentages):
           5 (31.25 % of base) : System.Private.CoreLib.dasm - System.Int128:System.IBinaryIntegerParseAndFormatInfo<System.Int128>.MultiplyBy16(System.Int128):System.Int128 (FullOpts)
           5 (31.25 % of base) : System.Private.CoreLib.dasm - System.UInt128:System.IBinaryIntegerParseAndFormatInfo<System.UInt128>.MultiplyBy16(System.UInt128):System.UInt128 (FullOpts)
           5 (29.41 % of base) : System.Private.CoreLib.dasm - System.Int128:System.IBinaryIntegerParseAndFormatInfo<System.Int128>.MultiplyBy10(System.Int128):System.Int128 (FullOpts)
           5 (29.41 % of base) : System.Private.CoreLib.dasm - System.UInt128:System.IBinaryIntegerParseAndFormatInfo<System.UInt128>.MultiplyBy10(System.UInt128):System.UInt128 (FullOpts)
           2 (28.57 % of base) : System.Private.CoreLib.dasm - System.Math:BigMul(ulong,ulong):System.UInt128 (FullOpts)
           2 (28.57 % of base) : System.Private.CoreLib.dasm - System.Runtime.Intrinsics.X86.X86Base+X64:BigMul(ulong,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
           2 (28.57 % of base) : System.Private.CoreLib.dasm - System.UInt64:BigMul(ulong,ulong):System.UInt128 (FullOpts)
           5 (21.74 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
           2 (20.00 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:Multiply64To128ThenFold(ulong,ulong):ulong (FullOpts)
           2 (20.00 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128MultiplyHigh(ulong,ulong):ulong (FullOpts)
           2 (16.67 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:IncreaseScale64(byref,uint) (FullOpts)
          20 (9.57 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
           2 (7.69 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:Multiply64To128(ulong,ulong,byref):ulong (FullOpts)
           2 (7.69 % of base) : System.Private.CoreLib.dasm - System.Math:BigMul(ulong,ulong,byref):ulong (FullOpts)
           2 (7.69 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMul(ulong,ulong,byref,byref) (FullOpts)
           2 (7.69 % of base) : System.Private.CoreLib.dasm - System.UIntPtr:BigMul(nuint,nuint,byref):nuint (FullOpts)
           2 (4.88 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulAdd(ulong,ulong,ulong,byref,byref) (FullOpts)
           2 (4.88 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulXAdd(ulong,ulong,ulong,ulong,byref,byref) (FullOpts)
          30 (4.08 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength17To128(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
           9 (3.96 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator+InvariantDivisor:.ctor(nuint):this (FullOpts)
          21 (3.69 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength17To128(ptr,uint,ulong):ulong (FullOpts)
          35 (3.54 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
           4 (3.33 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:Mix32Bytes(byref,byref,ptr,ptr,ulong,ulong,ulong,ulong,ulong) (FullOpts)
          38 (3.07 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength129To240(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
          22 (3.04 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength0To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
           2 (2.74 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator+InvariantDivisor:DivRem(nuint,byref):nuint:this (FullOpts)
          13 (2.28 % of base) : System.Private.CoreLib.dasm - System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
          13 (2.28 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:SubMul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
           2 (2.00 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulXAddC(ulong,ulong,ulong,ulong,byref,byref,byref) (FullOpts)
           2 (1.87 % of base) : System.Private.CoreLib.dasm - System.Number:TrigXMulXAddCwCarryIn(ulong,ulong,ulong,ulong,ulong,byref,byref,byref) (FullOpts)
           9 (1.66 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecMul(byref,byref) (FullOpts)
           2 (1.32 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash128:HashLength4To8(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
          10 (1.18 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ReduceFractionNegative(System.UInt128,int,System.Span`1[ulong]) (FullOpts)
          18 (1.11 % of base) : HotChocolate.Types.dasm - HotChocolate.Types.Relay.DefaultNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
          18 (1.11 % of base) : HotChocolate.Types.dasm - HotChocolate.Types.Relay.OptimizedNodeIdSerializer:ParseBase36(System.String,System.Func`2[System.String,System.Type]):HotChocolate.Types.Relay.NodeId:this (FullOpts)
          10 (1.10 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Divide(byref,byref,int,byref) (FullOpts)
           2 (1.07 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarCyFromDec(byref):long (FullOpts)
           7 (0.97 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:DivideInvariant(System.ReadOnlySpan`1[nuint],System.Numerics.BigIntegerCalculator+InvariantDivisor,int,System.Span`1[nuint],byref) (FullOpts)
           5 (0.80 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:TryMultiplyRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
           4 (0.71 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecMod(byref,byref) (FullOpts)
           3 (0.69 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecFromFloat[double](double,byref) (FullOpts)
           3 (0.63 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ExpReduce(byref,byref,ulong,ulong,int,byref):int (FullOpts)
           6 (0.29 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Pow(System.Number+DiyFp128,System.Number+DiyFp128):System.Number+DiyFp128 (FullOpts)
           1 (0.19 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:MontgomeryReduce(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):int (FullOpts)
           1 (0.06 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[long]:SampleToList(System.Collections.Generic.IEnumerable`1[long],int,byref):System.Collections.Generic.List`1[long] (FullOpts)
           1 (0.06 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[short]:SampleToList(System.Collections.Generic.IEnumerable`1[short],int,byref):System.Collections.Generic.List`1[short] (FullOpts)

Top method improvements (percentages):
         -19 (-100.00 % of base) : SixLabors.ImageSharp.dasm - SixLabors.ImageSharp.Memory.ByteMemoryOwner`1[double]:get_Memory():System.Memory`1[double]:this (FullOpts) (1 base, 0 diff methods)
         -14 (-41.18 % of base) : System.Private.CoreLib.dasm - System.Int128:op_Multiply(System.Int128,System.Int128):System.Int128 (FullOpts)
         -14 (-41.18 % of base) : System.Private.CoreLib.dasm - System.UInt128:op_Multiply(System.UInt128,System.UInt128):System.UInt128 (FullOpts)
         -64 (-28.44 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecCmpSub(byref,byref):int (FullOpts)
         -14 (-25.45 % of base) : System.Private.CoreLib.dasm - System.Int128:System.Numerics.INumberBase<System.Int128>.MultiplyAddEstimate(System.Int128,System.Int128,System.Int128):System.Int128 (FullOpts)
         -14 (-25.45 % of base) : System.Private.CoreLib.dasm - System.UInt128:System.Numerics.INumberBase<System.UInt128>.MultiplyAddEstimate(System.UInt128,System.UInt128,System.UInt128):System.UInt128 (FullOpts)
          -8 (-24.24 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:IncreaseScale(byref,uint) (FullOpts)
          -8 (-22.22 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:IncreaseScale(byref,uint):uint (FullOpts)
         -30 (-21.58 % of base) : System.Private.CoreLib.dasm - System.UInt128:BigMul(System.UInt128,System.UInt128,byref):System.UInt128 (FullOpts)
         -38 (-21.23 % of base) : System.Private.CoreLib.dasm - System.Number:ComputeProductApproximation(int,long,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
         -11 (-15.49 % of base) : System.Runtime.Numerics.dasm - System.Number:<NumberToBigInteger>g__MultiplyAdd|18_4(System.Span`1[nuint],nuint,nuint):nuint (FullOpts)
         -15 (-9.43 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:Div128By96(byref,byref):uint (FullOpts)
         -10 (-8.33 % of base) : System.Private.CoreLib.dasm - System.Int128:op_Modulus(System.Int128,System.Int128):System.Int128 (FullOpts)
         -12 (-8.16 % of base) : System.Private.CoreLib.dasm - System.UInt128:<DivRem>g__Divide96BitsBy64Bits|83_3(ulong,uint,ulong):System.ValueTuple`2[uint,ulong] (FullOpts)
         -13 (-7.34 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHashShared:MergeAccumulators(ptr,ptr,ulong):ulong (FullOpts)
         -31 (-6.98 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength0To16(ptr,uint,ulong):ulong (FullOpts)
         -42 (-6.92 % of base) : System.Private.CoreLib.dasm - System.Numerics.BigIntegerCalculator:MulAdd1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -42 (-6.92 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:MulAdd1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -25 (-6.79 % of base) : System.Private.CoreLib.dasm - System.UInt128:<DivRem>g__DivideSlow|83_0(System.UInt128,System.UInt128):System.ValueTuple`2[ulong,System.UInt128] (FullOpts)
         -15 (-6.52 % of base) : System.Private.CoreLib.dasm - System.Random+XoshiroImpl:NextInt64(long,long):long:this (FullOpts)
          -5 (-6.49 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Pow5(int):System.UInt128 (FullOpts)
         -16 (-5.10 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ReduceBuildInteger(System.UInt128,int,System.Span`1[ulong]):int (FullOpts)
         -23 (-4.89 % of base) : System.Private.CoreLib.dasm - System.Numerics.BigIntegerCalculator:Mul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -23 (-4.89 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:Mul1(System.Span`1[nuint],System.ReadOnlySpan`1[nuint],nuint):nuint (FullOpts)
         -12 (-4.71 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ExtendedMultiply(byref,byref,byref,byref) (FullOpts)
          -6 (-4.41 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128Multiply(byref,byref,byref) (FullOpts)
         -13 (-4.30 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:GetPowBitLengthBounds(int,int,int,int,int):System.ValueTuple`2[ulong,ulong] (FullOpts)
          -4 (-4.08 % of base) : System.IO.Hashing.dasm - System.IO.Hashing.XxHash3:HashLength9To16(ptr,uint,ulong):ulong (FullOpts)
          -8 (-3.69 % of base) : System.Private.CoreLib.dasm - System.Random+ImplBase:NextUInt64(ulong,System.Random+XoshiroImpl):ulong (FullOpts)
          -8 (-3.69 % of base) : System.Private.CoreLib.dasm - System.Random+XoshiroImpl:NextInt64(long):long:this (FullOpts)
          -3 (-2.52 % of base) : System.Private.CoreLib.dasm - System.Number+BigInteger:Multiply10():this (FullOpts)
         -15 (-2.52 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:PowCore(nuint,System.ReadOnlySpan`1[nuint],nuint,nuint):nuint (FullOpts)
          -8 (-2.30 % of base) : System.Private.CoreLib.dasm - System.Random+ThreadSafeRandom:NextInt64(long):long:this (FullOpts)
         -32 (-2.25 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:DecAddSub(byref,byref,bool) (FullOpts)
         -21 (-2.20 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128EvaluatePositivePolynomial(byref,long,System.ReadOnlySpan`1[System.Number+DiyFp128FixedCoefficient],int,long,byref) (FullOpts)
          -3 (-2.14 % of base) : System.Private.CoreLib.dasm - System.Int128:DivRem(System.Int128,System.Int128):System.ValueTuple`2[System.Int128,System.Int128] (FullOpts)
          -7 (-1.98 % of base) : System.Private.CoreLib.dasm - System.Number:TryRoundToDecimalDigitsViaInteger(double,int,int,byref):bool (FullOpts)
          -7 (-1.96 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128ReduceFractionPositive(System.ReadOnlySpan`1[ulong],System.Span`1[ulong]) (FullOpts)
          -6 (-1.72 % of base) : System.Private.CoreLib.dasm - System.Random+ThreadSafeRandom:NextInt64(long,long):long:this (FullOpts)
         -12 (-1.50 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:TryMultiplyShiftedRepeatedLimb(System.ReadOnlySpan`1[nuint],System.ReadOnlySpan`1[nuint],System.Span`1[nuint]):bool (FullOpts)
          -5 (-1.11 % of base) : System.Private.CoreLib.dasm - System.Number+BigInteger:HeuristicDivide(byref,byref):uint (FullOpts)
          -2 (-0.91 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:PowCore(nuint,nuint,nuint,nuint):nuint (FullOpts)
         -12 (-0.77 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[byte]:SampleToList(System.Collections.Generic.IEnumerable`1[byte],int,byref):System.Collections.Generic.List`1[byte] (FullOpts)
         -12 (-0.77 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[int]:SampleToList(System.Collections.Generic.IEnumerable`1[int],int,byref):System.Collections.Generic.List`1[int] (FullOpts)
         -12 (-0.77 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[double]:SampleToList(System.Collections.Generic.IEnumerable`1[double],int,byref):System.Collections.Generic.List`1[double] (FullOpts)
          -8 (-0.46 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[System.Numerics.Vector`1[float]]:SampleToList(System.Collections.Generic.IEnumerable`1[System.Numerics.Vector`1[float]],int,byref):System.Collections.Generic.List`1[System.Numerics.Vector`1[float]] (FullOpts)
          -7 (-0.44 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[System.Nullable`1[int]]:SampleToList(System.Collections.Generic.IEnumerable`1[System.Nullable`1[int]],int,byref):System.Collections.Generic.List`1[System.Nullable`1[int]] (FullOpts)
          -8 (-0.38 % of base) : System.Linq.dasm - System.Linq.Enumerable+ShuffleTakeIterator`1[System.__Canon]:SampleToList(System.Collections.Generic.IEnumerable`1[System.__Canon],int,byref):System.Collections.Generic.List`1[System.__Canon] (FullOpts)
          -1 (-0.35 % of base) : System.Runtime.Numerics.dasm - System.Numerics.BigIntegerCalculator:<Square>g__Naive|120_2(System.ReadOnlySpan`1[nuint],System.Span`1[nuint]) (FullOpts)
          -2 (-0.27 % of base) : System.Private.CoreLib.dasm - System.Number:DiyFp128EvaluateNegativePolynomial(byref,long,System.ReadOnlySpan`1[System.Number+DiyFp128FixedCoefficient],int,long,byref) (FullOpts)
          -4 (-0.22 % of base) : System.Private.CoreLib.dasm - System.Decimal+DecCalc:VarDecDiv(byref,byref) (FullOpts)

97 total methods with Code Size differences (51 improved, 46 regressed), 2192970 unchanged.

--------------------------------------------------------------------------------

Artifacts:

Activity

  1. MihuBot commented on Sep 4, 2026

    @MihuBot
    MihuBot
    on Sep 4, 2026
    OwnerAuthor

    Top method regressions

    35 (3.54 % of base) - System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong 
     ; Assembly listing for method System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; partially interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 54 single block inlinees; 48 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T01] ( 19, 15.50)    long  ->  rdi         single-def
 ;  V01 arg1         [V01,T06] (  5,  5   )     int  ->  rsi         single-def
 ;  V02 arg2         [V02,T02] ( 19, 15.50)    long  ->  [rbp-0x08]  single-def
-;  V03 loc0         [V03,T00] ( 32, 25   )    long  ->  rcx        
+;  V03 loc0         [V03,T00] ( 32, 25   )    long  ->  rax        
 ;* V04 loc1         [V04    ] (  0,  0   )     int  ->  zero-ref   
 ;# V05 OutArgs      [V05    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V06 tmp1         [V06    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V07 tmp2         [V07    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V08 tmp3         [V08    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V09 tmp4         [V09    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V10 tmp5         [V10    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V11 tmp6         [V11    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V12 tmp7         [V12    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V13 tmp8         [V13    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V14 tmp9         [V14    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V15 tmp10        [V15    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V16 tmp11        [V16,T07] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V16 tmp11        [V16,T07] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V17 tmp12        [V17    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V18 tmp13        [V18    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V19 tmp14        [V19    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V20 tmp15        [V20    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V21 tmp16        [V21    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V22 tmp17        [V22    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V23 tmp18        [V23    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V24 tmp19        [V24    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V25 tmp20        [V25    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V26 tmp21        [V26    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V27 tmp22        [V27,T08] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V27 tmp22        [V27,T08] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V28 tmp23        [V28    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V29 tmp24        [V29    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V30 tmp25        [V30    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V31 tmp26        [V31    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V32 tmp27        [V32    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V33 tmp28        [V33    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V34 tmp29        [V34    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V35 tmp30        [V35    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V36 tmp31        [V36    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V37 tmp32        [V37    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V38 tmp33        [V38,T09] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V38 tmp33        [V38,T09] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V39 tmp34        [V39    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V40 tmp35        [V40    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V41 tmp36        [V41    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V42 tmp37        [V42    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V43 tmp38        [V43    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V44 tmp39        [V44    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V45 tmp40        [V45    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V46 tmp41        [V46    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V47 tmp42        [V47    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V48 tmp43        [V48    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V49 tmp44        [V49,T10] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V49 tmp44        [V49,T10] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V50 tmp45        [V50    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V51 tmp46        [V51    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V52 tmp47        [V52    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V53 tmp48        [V53    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V54 tmp49        [V54    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V55 tmp50        [V55    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V56 tmp51        [V56    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V57 tmp52        [V57    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V58 tmp53        [V58    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V59 tmp54        [V59    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V60 tmp55        [V60,T11] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V60 tmp55        [V60,T11] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V61 tmp56        [V61    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V62 tmp57        [V62    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V63 tmp58        [V63    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V64 tmp59        [V64    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V65 tmp60        [V65    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V66 tmp61        [V66    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V67 tmp62        [V67    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V68 tmp63        [V68    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V69 tmp64        [V69    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V70 tmp65        [V70    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V71 tmp66        [V71,T12] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V71 tmp66        [V71,T12] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V72 tmp67        [V72    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V73 tmp68        [V73    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V74 tmp69        [V74    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V75 tmp70        [V75    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V76 tmp71        [V76    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V77 tmp72        [V77    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V78 tmp73        [V78    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V79 tmp74        [V79    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V80 tmp75        [V80    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V81 tmp76        [V81    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V82 tmp77        [V82,T13] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V82 tmp77        [V82,T13] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V83 tmp78        [V83    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V84 tmp79        [V84    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V85 tmp80        [V85    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V86 tmp81        [V86    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V87 tmp82        [V87    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V88 tmp83        [V88    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V89 tmp84        [V89    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V90 tmp85        [V90    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V91 tmp86        [V91    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V92 tmp87        [V92    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V93 tmp88        [V93,T04] (  6, 12   )    long  ->  rax         "Inlining Arg"
-;  V94 tmp89        [V94,T16] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V93 tmp88        [V93,T04] (  6, 12   )    long  ->  rdx         "Inlining Arg"
+;  V94 tmp89        [V94,T16] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V95 tmp90        [V95    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V96 tmp91        [V96    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V97 tmp92        [V97    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V98 tmp93        [V98    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V99 tmp94        [V99    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V100 tmp95       [V100    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V101 tmp96       [V101    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V102 tmp97       [V102    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V103 tmp98       [V103    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V104 tmp99       [V104    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V105 tmp100      [V105,T17] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V105 tmp100      [V105,T17] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V106 tmp101      [V106    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V107 tmp102      [V107    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V108 tmp103      [V108    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V109 tmp104      [V109    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V110 tmp105      [V110    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V111 tmp106      [V111    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V112 tmp107      [V112    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V113 tmp108      [V113    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V114 tmp109      [V114    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V115 tmp110      [V115    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V116 tmp111      [V116,T18] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V116 tmp111      [V116,T18] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V117 tmp112      [V117    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V118 tmp113      [V118    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V119 tmp114      [V119    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V120 tmp115      [V120    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V121 tmp116      [V121    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V122 tmp117      [V122    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V123 tmp118      [V123    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V124 tmp119      [V124    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V125 tmp120      [V125    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V126 tmp121      [V126    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V127 tmp122      [V127,T19] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V127 tmp122      [V127,T19] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V128 tmp123      [V128    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V129 tmp124      [V129    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V130 tmp125      [V130    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V131 tmp126      [V131    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V132 tmp127      [V132    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V133 tmp128      [V133    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V134 tmp129      [V134    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V135 tmp130      [V135    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V136 tmp131      [V136    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V137 tmp132      [V137    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V138 tmp133      [V138,T20] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V138 tmp133      [V138,T20] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V139 tmp134      [V139    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V140 tmp135      [V140    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V141 tmp136      [V141    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V142 tmp137      [V142    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V143 tmp138      [V143    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V144 tmp139      [V144    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V145 tmp140      [V145    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V146 tmp141      [V146    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V147 tmp142      [V147    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V148 tmp143      [V148    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V149 tmp144      [V149,T21] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V149 tmp144      [V149,T21] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V150 tmp145      [V150    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V151 tmp146      [V151    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V152 tmp147      [V152    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V153 tmp148      [V153    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V154 tmp149      [V154    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V155 tmp150      [V155    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V156 tmp151      [V156    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V157 tmp152      [V157    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V158 tmp153      [V158    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V159 tmp154      [V159    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V160 tmp155      [V160,T22] (  3,  3   )    long  ->  rax         "Inlining Arg"
+;  V160 tmp155      [V160,T22] (  3,  3   )    long  ->  rdx         "Inlining Arg"
 ;* V161 tmp156      [V161    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V162 tmp157      [V162    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V163 tmp158      [V163    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V164 tmp159      [V164    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V165 tmp160      [V165    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V166 tmp161      [V166    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V167 tmp162      [V167    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V168 tmp163      [V168    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V169 tmp164      [V169    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V170 tmp165      [V170    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V171 tmp166      [V171,T14] (  3,  6   )    long  ->  rax         "Inlining Arg"
+;  V171 tmp166      [V171,T14] (  3,  6   )    long  ->  rdx         "Inlining Arg"
 ;* V172 tmp167      [V172    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V173 tmp168      [V173    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V174 tmp169      [V174    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V175 tmp170      [V175    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V176 tmp171      [V176    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V177 tmp172      [V177    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V178 tmp173      [V178    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V179 tmp174      [V179    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V180 tmp175      [V180    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V181 tmp176      [V181    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V182 tmp177      [V182,T05] (  6, 12   )    long  ->  rax         "Inlining Arg"
+;  V182 tmp177      [V182,T05] (  6, 12   )    long  ->  rcx         "Inlining Arg"
 ;* V183 tmp178      [V183    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V14.Item1 (fldOffset=0x0)" P-DEP
 ;* V184 tmp179      [V184    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V14.Item2 (fldOffset=0x8)" P-DEP
-;  V185 tmp180      [V185,T23] (  2,  2   )    long  ->  rax         "field V15.Item1 (fldOffset=0x0)" P-INDEP
-;  V186 tmp181      [V186,T24] (  2,  2   )    long  ->  rdx         "field V15.Item2 (fldOffset=0x8)" P-INDEP
+;  V185 tmp180      [V185,T23] (  2,  2   )    long  ->  rdx         "field V15.Item1 (fldOffset=0x0)" P-INDEP
+;  V186 tmp181      [V186,T24] (  2,  2   )    long  ->  rcx         "field V15.Item2 (fldOffset=0x8)" P-INDEP
 ;* V187 tmp182      [V187    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V25.Item1 (fldOffset=0x0)" P-DEP
 ;* V188 tmp183      [V188    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V25.Item2 (fldOffset=0x8)" P-DEP
-;  V189 tmp184      [V189,T25] (  2,  2   )    long  ->  rax         "field V26.Item1 (fldOffset=0x0)" P-INDEP
-;  V190 tmp185      [V190,T26] (  2,  2   )    long  ->  rdx         "field V26.Item2 (fldOffset=0x8)" P-INDEP
+;  V189 tmp184      [V189,T25] (  2,  2   )    long  ->  rdx         "field V26.Item1 (fldOffset=0x0)" P-INDEP
+;  V190 tmp185      [V190,T26] (  2,  2   )    long  ->  rcx         "field V26.Item2 (fldOffset=0x8)" P-INDEP
 ;* V191 tmp186      [V191    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V36.Item1 (fldOffset=0x0)" P-DEP
 ;* V192 tmp187      [V192    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V36.Item2 (fldOffset=0x8)" P-DEP
-;  V193 tmp188      [V193,T27] (  2,  2   )    long  ->  rax         "field V37.Item1 (fldOffset=0x0)" P-INDEP
-;  V194 tmp189      [V194,T28] (  2,  2   )    long  ->  rdx         "field V37.Item2 (fldOffset=0x8)" P-INDEP
+;  V193 tmp188      [V193,T27] (  2,  2   )    long  ->  rdx         "field V37.Item1 (fldOffset=0x0)" P-INDEP
+;  V194 tmp189      [V194,T28] (  2,  2   )    long  ->  rcx         "field V37.Item2 (fldOffset=0x8)" P-INDEP
 ;* V195 tmp190      [V195    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V47.Item1 (fldOffset=0x0)" P-DEP
 ;* V196 tmp191      [V196    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V47.Item2 (fldOffset=0x8)" P-DEP
-;  V197 tmp192      [V197,T29] (  2,  2   )    long  ->  rax         "field V48.Item1 (fldOffset=0x0)" P-INDEP
-;  V198 tmp193      [V198,T30] (  2,  2   )    long  ->  rdx         "field V48.Item2 (fldOffset=0x8)" P-INDEP
+;  V197 tmp192      [V197,T29] (  2,  2   )    long  ->  rdx         "field V48.Item1 (fldOffset=0x0)" P-INDEP
+;  V198 tmp193      [V198,T30] (  2,  2   )    long  ->  rcx         "field V48.Item2 (fldOffset=0x8)" P-INDEP
 ;* V199 tmp194      [V199    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V58.Item1 (fldOffset=0x0)" P-DEP
 ;* V200 tmp195      [V200    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V58.Item2 (fldOffset=0x8)" P-DEP
-;  V201 tmp196      [V201,T31] (  2,  2   )    long  ->  rax         "field V59.Item1 (fldOffset=0x0)" P-INDEP
-;  V202 tmp197      [V202,T32] (  2,  2   )    long  ->  rdx         "field V59.Item2 (fldOffset=0x8)" P-INDEP
+;  V201 tmp196      [V201,T31] (  2,  2   )    long  ->  rdx         "field V59.Item1 (fldOffset=0x0)" P-INDEP
+;  V202 tmp197      [V202,T32] (  2,  2   )    long  ->  rcx         "field V59.Item2 (fldOffset=0x8)" P-INDEP
 ;* V203 tmp198      [V203    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V69.Item1 (fldOffset=0x0)" P-DEP
 ;* V204 tmp199      [V204    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V69.Item2 (fldOffset=0x8)" P-DEP
-;  V205 tmp200      [V205,T33] (  2,  2   )    long  ->  rax         "field V70.Item1 (fldOffset=0x0)" P-INDEP
-;  V206 tmp201      [V206,T34] (  2,  2   )    long  ->  rdx         "field V70.Item2 (fldOffset=0x8)" P-INDEP
+;  V205 tmp200      [V205,T33] (  2,  2   )    long  ->  rdx         "field V70.Item1 (fldOffset=0x0)" P-INDEP
+;  V206 tmp201      [V206,T34] (  2,  2   )    long  ->  rcx         "field V70.Item2 (fldOffset=0x8)" P-INDEP
 ;* V207 tmp202      [V207    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V80.Item1 (fldOffset=0x0)" P-DEP
 ;* V208 tmp203      [V208    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V80.Item2 (fldOffset=0x8)" P-DEP
-;  V209 tmp204      [V209,T35] (  2,  2   )    long  ->  rax         "field V81.Item1 (fldOffset=0x0)" P-INDEP
-;  V210 tmp205      [V210,T36] (  2,  2   )    long  ->  rdx         "field V81.Item2 (fldOffset=0x8)" P-INDEP
+;  V209 tmp204      [V209,T35] (  2,  2   )    long  ->  rdx         "field V81.Item1 (fldOffset=0x0)" P-INDEP
+;  V210 tmp205      [V210,T36] (  2,  2   )    long  ->  rcx         "field V81.Item2 (fldOffset=0x8)" P-INDEP
 ;* V211 tmp206      [V211    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V91.Item1 (fldOffset=0x0)" P-DEP
 ;* V212 tmp207      [V212    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V91.Item2 (fldOffset=0x8)" P-DEP
-;  V213 tmp208      [V213,T37] (  2,  2   )    long  ->  rax         "field V92.Item1 (fldOffset=0x0)" P-INDEP
-;  V214 tmp209      [V214,T38] (  2,  2   )    long  ->  rdx         "field V92.Item2 (fldOffset=0x8)" P-INDEP
+;  V213 tmp208      [V213,T37] (  2,  2   )    long  ->  rdx         "field V92.Item1 (fldOffset=0x0)" P-INDEP
+;  V214 tmp209      [V214,T38] (  2,  2   )    long  ->  rcx         "field V92.Item2 (fldOffset=0x8)" P-INDEP
 ;* V215 tmp210      [V215    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V103.Item1 (fldOffset=0x0)" P-DEP
 ;* V216 tmp211      [V216    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V103.Item2 (fldOffset=0x8)" P-DEP
-;  V217 tmp212      [V217,T41] (  2,  1   )    long  ->  rax         "field V104.Item1 (fldOffset=0x0)" P-INDEP
-;  V218 tmp213      [V218,T42] (  2,  1   )    long  ->  rdx         "field V104.Item2 (fldOffset=0x8)" P-INDEP
+;  V217 tmp212      [V217,T41] (  2,  1   )    long  ->  rdx         "field V104.Item1 (fldOffset=0x0)" P-INDEP
+;  V218 tmp213      [V218,T42] (  2,  1   )    long  ->  rcx         "field V104.Item2 (fldOffset=0x8)" P-INDEP
 ;* V219 tmp214      [V219    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V114.Item1 (fldOffset=0x0)" P-DEP
 ;* V220 tmp215      [V220    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V114.Item2 (fldOffset=0x8)" P-DEP
-;  V221 tmp216      [V221,T43] (  2,  1   )    long  ->  rax         "field V115.Item1 (fldOffset=0x0)" P-INDEP
-;  V222 tmp217      [V222,T44] (  2,  1   )    long  ->  rdx         "field V115.Item2 (fldOffset=0x8)" P-INDEP
+;  V221 tmp216      [V221,T43] (  2,  1   )    long  ->  rdx         "field V115.Item1 (fldOffset=0x0)" P-INDEP
+;  V222 tmp217      [V222,T44] (  2,  1   )    long  ->  rcx         "field V115.Item2 (fldOffset=0x8)" P-INDEP
 ;* V223 tmp218      [V223    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V125.Item1 (fldOffset=0x0)" P-DEP
 ;* V224 tmp219      [V224    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V125.Item2 (fldOffset=0x8)" P-DEP
-;  V225 tmp220      [V225,T45] (  2,  1   )    long  ->  rax         "field V126.Item1 (fldOffset=0x0)" P-INDEP
-;  V226 tmp221      [V226,T46] (  2,  1   )    long  ->  rdx         "field V126.Item2 (fldOffset=0x8)" P-INDEP
+;  V225 tmp220      [V225,T45] (  2,  1   )    long  ->  rdx         "field V126.Item1 (fldOffset=0x0)" P-INDEP
+;  V226 tmp221      [V226,T46] (  2,  1   )    long  ->  rcx         "field V126.Item2 (fldOffset=0x8)" P-INDEP
 ;* V227 tmp222      [V227    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V136.Item1 (fldOffset=0x0)" P-DEP
 ;* V228 tmp223      [V228    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V136.Item2 (fldOffset=0x8)" P-DEP
-;  V229 tmp224      [V229,T47] (  2,  1   )    long  ->  rax         "field V137.Item1 (fldOffset=0x0)" P-INDEP
-;  V230 tmp225      [V230,T48] (  2,  1   )    long  ->  rdx         "field V137.Item2 (fldOffset=0x8)" P-INDEP
+;  V229 tmp224      [V229,T47] (  2,  1   )    long  ->  rdx         "field V137.Item1 (fldOffset=0x0)" P-INDEP
+;  V230 tmp225      [V230,T48] (  2,  1   )    long  ->  rcx         "field V137.Item2 (fldOffset=0x8)" P-INDEP
 ;* V231 tmp226      [V231    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V147.Item1 (fldOffset=0x0)" P-DEP
 ;* V232 tmp227      [V232    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V147.Item2 (fldOffset=0x8)" P-DEP
-;  V233 tmp228      [V233,T49] (  2,  1   )    long  ->  rax         "field V148.Item1 (fldOffset=0x0)" P-INDEP
-;  V234 tmp229      [V234,T50] (  2,  1   )    long  ->  rdx         "field V148.Item2 (fldOffset=0x8)" P-INDEP
+;  V233 tmp228      [V233,T49] (  2,  1   )    long  ->  rdx         "field V148.Item1 (fldOffset=0x0)" P-INDEP
+;  V234 tmp229      [V234,T50] (  2,  1   )    long  ->  rcx         "field V148.Item2 (fldOffset=0x8)" P-INDEP
 ;* V235 tmp230      [V235    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V158.Item1 (fldOffset=0x0)" P-DEP
 ;* V236 tmp231      [V236    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V158.Item2 (fldOffset=0x8)" P-DEP
-;  V237 tmp232      [V237,T51] (  2,  1   )    long  ->  rax         "field V159.Item1 (fldOffset=0x0)" P-INDEP
-;  V238 tmp233      [V238,T52] (  2,  1   )    long  ->  rdx         "field V159.Item2 (fldOffset=0x8)" P-INDEP
+;  V237 tmp232      [V237,T51] (  2,  1   )    long  ->  rdx         "field V159.Item1 (fldOffset=0x0)" P-INDEP
+;  V238 tmp233      [V238,T52] (  2,  1   )    long  ->  rcx         "field V159.Item2 (fldOffset=0x8)" P-INDEP
 ;* V239 tmp234      [V239    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V169.Item1 (fldOffset=0x0)" P-DEP
 ;* V240 tmp235      [V240    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V169.Item2 (fldOffset=0x8)" P-DEP
-;  V241 tmp236      [V241,T53] (  2,  1   )    long  ->  rax         "field V170.Item1 (fldOffset=0x0)" P-INDEP
-;  V242 tmp237      [V242,T54] (  2,  1   )    long  ->  rdx         "field V170.Item2 (fldOffset=0x8)" P-INDEP
+;  V241 tmp236      [V241,T53] (  2,  1   )    long  ->  rdx         "field V170.Item1 (fldOffset=0x0)" P-INDEP
+;  V242 tmp237      [V242,T54] (  2,  1   )    long  ->  rcx         "field V170.Item2 (fldOffset=0x8)" P-INDEP
 ;* V243 tmp238      [V243    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V180.Item1 (fldOffset=0x0)" P-DEP
 ;* V244 tmp239      [V244    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V180.Item2 (fldOffset=0x8)" P-DEP
-;  V245 tmp240      [V245,T39] (  2,  2   )    long  ->  rax         "field V181.Item1 (fldOffset=0x0)" P-INDEP
+;  V245 tmp240      [V245,T39] (  2,  2   )    long  ->  rcx         "field V181.Item1 (fldOffset=0x0)" P-INDEP
 ;  V246 tmp241      [V246,T40] (  2,  2   )    long  ->  rdx         "field V181.Item2 (fldOffset=0x8)" P-INDEP
 ;  V247 cse0        [V247,T03] ( 17, 13.50)    long  ->   r8         "CSE #01: aggressive"
-;  V248 rat0        [V248,T15] (  3,  5.75)     int  ->  rax         "ReplaceWithLclVar is creating a new local variable"
+;  V248 rat0        [V248,T15] (  3,  5.75)     int  ->  rdx         "ReplaceWithLclVar is creating a new local variable"
 ;
 ; Lcl frame size = 16
 
 G_M37356_IG01:
        push     rbp
        sub      rsp, 16
        lea      rbp, [rsp+0x10]
 						;; size=10 bbWeight=1 PerfScore 1.75
 G_M37356_IG02:
-       mov      ecx, esi
-       mov      r8, 0xD1FFAB1E
-       imul     rcx, r8
-       mov      rax, 0xD1FFAB1E
-       add      rax, rdx
-       xor      rax, qword ptr [rdi]
+       mov      eax, esi
+       mov      rcx, 0xD1FFAB1E
+       imul     rax, rcx
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, rdx
+       xor      rcx, qword ptr [rdi]
        mov      qword ptr [rbp-0x08], rdx
        mov      r8, rdx
        neg      r8
        mov      r9, 0xD1FFAB1E
        add      r9, r8
        xor      r9, qword ptr [rdi+0x08]
-       mul      rdx:rax, r9
-       xor      rax, rdx
-       add      rcx, rax
-       lea      rax, [rdi+0x10]
-       mov      rdx, 0xD1FFAB1E
+       mov      rdx, rcx
+       mulx     rcx, rdx, r9
+       xor      rdx, rcx
+       add      rax, rdx
+       lea      rdx, [rdi+0x10]
+       mov      rcx, 0xD1FFAB1E
        mov      r9, qword ptr [rbp-0x08]
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       lea      rax, [rdi+0x20]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       lea      rdx, [rdi+0x20]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       lea      rax, [rdi+0x30]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       lea      rdx, [rdi+0x30]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       lea      rax, [rdi+0x40]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       lea      rdx, [rdi+0x40]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       lea      rax, [rdi+0x50]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-						;; size=297 bbWeight=1 PerfScore 52.50
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       lea      rdx, [rdi+0x50]
+						;; size=297 bbWeight=1 PerfScore 52.25
 G_M37356_IG03:
-       xor      rdx, qword ptr [rax]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       lea      rdx, [rdi+0x60]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
+       mov      r10, 0xD1FFAB1E
+       add      r10, r8
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       lea      rdx, [rdi+0x70]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
+       mov      r10, 0xD1FFAB1E
+       add      r10, r8
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+       shr      rax, 37
        xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       lea      rax, [rdi+0x60]
        mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
-       mov      r10, 0xD1FFAB1E
-       add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
+       imul     rdx, rax
+       mov      rax, rdx
+       shr      rax, 32
        xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       lea      rax, [rdi+0x70]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
-       mov      r10, 0xD1FFAB1E
-       add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       shr      rcx, 37
-       xor      rcx, rax
-       mov      rax, 0xD1FFAB1E
-       imul     rax, rcx
-       mov      rcx, rax
-       shr      rcx, 32
-       xor      rcx, rax
-       lea      eax, [rsi-0x80]
-       shr      eax, 4
-       cmp      eax, 6
+       lea      edx, [rsi-0x80]
+       shr      edx, 4
+       cmp      edx, 6
        ja       SHORT G_M37356_IG05
-						;; size=181 bbWeight=1 PerfScore 33.75
+						;; size=200 bbWeight=1 PerfScore 34.25
 G_M37356_IG04:
-       mov      eax, eax
-       lea      rdx, [reloc @RWD00]
-       mov      edx, dword ptr [rdx+4*rax]
+       mov      edx, edx
+       lea      rcx, [reloc @RWD00]
+       mov      ecx, dword ptr [rcx+4*rdx]
        lea      r10, G_M37356_IG02
-       add      rdx, r10
-       jmp      rdx
+       add      rcx, r10
+       jmp      rcx
 						;; size=24 bbWeight=0.88 PerfScore 5.25
 G_M37356_IG05:
-       lea      rax, [rdi+0xE0]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0xE0]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG06:
-       lea      rax, [rdi+0xD0]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0xD0]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG07:
-       lea      rax, [rdi+0xC0]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0xC0]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG08:
-       lea      rax, [rdi+0xB0]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0xB0]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG09:
-       lea      rax, [rdi+0xA0]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0xA0]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG10:
-       lea      rax, [rdi+0x90]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0x90]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG11:
-       lea      rax, [rdi+0x80]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       lea      rdx, [rdi+0x80]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      r10, 0xD1FFAB1E
        add      r10, r8
-       xor      r10, qword ptr [rax+0x08]
-       mov      rax, r10
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-						;; size=55 bbWeight=0.50 PerfScore 4.75
+       xor      r10, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rcx, rdx, r10
+       xor      rdx, rcx
+       add      rdx, rax
+       mov      rax, rdx
+						;; size=57 bbWeight=0.50 PerfScore 4.75
 G_M37356_IG12:
-       mov      eax, esi
-       lea      rax, [rdi+rax-0x10]
-       mov      rdx, 0xD1FFAB1E
-       add      rdx, r9
-       xor      rdx, qword ptr [rax]
+       mov      edx, esi
+       lea      rdx, [rdi+rdx-0x10]
+       mov      rcx, 0xD1FFAB1E
+       add      rcx, r9
+       xor      rcx, qword ptr [rdx]
        mov      rdi, 0xD1FFAB1E
        add      rdi, r8
-       xor      rdi, qword ptr [rax+0x08]
-       mov      rax, rdi
-       mul      rdx:rax, rdx
-       xor      rax, rdx
-       add      rax, rcx
-       mov      rcx, rax
-       shr      rcx, 37
-       xor      rcx, rax
-       mov      rax, 0xD1FFAB1E
-       imul     rax, rcx
-       mov      rcx, rax
-       shr      rcx, 32
+       xor      rdi, qword ptr [rdx+0x08]
+       mov      rdx, rcx
+       mulx     rdx, rcx, rdi
+       xor      rcx, rdx
+       add      rcx, rax
+       mov      rax, rcx
+       shr      rax, 37
        xor      rax, rcx
-						;; size=86 bbWeight=1 PerfScore 14.25
+       mov      rcx, 0xD1FFAB1E
+       imul     rcx, rax
+       mov      rax, rcx
+       shr      rax, 32
+       xor      rax, rcx
+						;; size=88 bbWeight=1 PerfScore 14.25
 G_M37356_IG13:
        add      rsp, 16
        pop      rbp
        ret      
 						;; size=6 bbWeight=1 PerfScore 1.75
 RWD00  	dd	G_M37356_IG12 - G_M37356_IG02
        	dd	G_M37356_IG11 - G_M37356_IG02
        	dd	G_M37356_IG10 - G_M37356_IG02
        	dd	G_M37356_IG09 - G_M37356_IG02
        	dd	G_M37356_IG08 - G_M37356_IG02
        	dd	G_M37356_IG07 - G_M37356_IG02
        	dd	G_M37356_IG06 - G_M37356_IG02
 
 
-; Total bytes of code 989, prolog size 10, PerfScore 142.50, instruction count 227, allocated bytes for code 989 (MethodHash=d8616e13) for method System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
+; Total bytes of code 1024, prolog size 10, PerfScore 142.75, instruction count 228, allocated bytes for code 1024 (MethodHash=d8616e13) for method System.IO.Hashing.XxHash3:HashLength129To240(ptr,uint,ulong):ulong (FullOpts)
 ; ============================================================
    20 (9.57 % of base) - System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 
     ; Assembly listing for method System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; partially interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 10 single block inlinees; 4 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T01] (  4,  4   )    long  ->  rdi         single-def
 ;  V01 arg1         [V01,T02] (  4,  4   )     int  ->  rsi         single-def
 ;  V02 arg2         [V02,T03] (  4,  4   )    long  ->  rdx         single-def
 ;  V03 loc0         [V03,T10] (  2,  2   )    long  ->  rax        
 ;  V04 loc1         [V04,T11] (  2,  2   )    long  ->  rcx        
 ;  V05 loc2         [V05,T00] (  6,  6   )    long  ->  rdi        
-;  V06 loc3         [V06,T08] (  3,  3   )    long  ->  [rbp-0x08]  spill-single-def
-;  V07 loc4         [V07,T12] (  2,  2   )    long  ->  rax         ld-addr-op
-;  V08 loc5         [V08,T06] (  5,  5   )    long  ->  rdx        
-;  V09 loc6         [V09,T13] (  2,  2   )    long  ->  rax         ld-addr-op
+;  V06 loc3         [V06,T08] (  3,  3   )    long  ->  rax        
+;  V07 loc4         [V07,T12] (  2,  2   )    long  ->  rdx         ld-addr-op
+;  V08 loc5         [V08,T06] (  5,  5   )    long  ->  [rbp-0x08] 
+;  V09 loc6         [V09,T13] (  2,  2   )    long  ->  rcx         ld-addr-op
 ;# V10 OutArgs      [V10    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;  V11 tmp1         [V11,T07] (  2,  4   )    long  ->  rdx         "impAppendStmt"
 ;* V12 tmp2         [V12    ] (  0,  0   )    long  ->  zero-ref   
 ;* V13 tmp3         [V13    ] (  0,  0   )    long  ->  zero-ref   
 ;* V14 tmp4         [V14    ] (  0,  0   )    long  ->  zero-ref   
 ;* V15 tmp5         [V15    ] (  0,  0   )  struct (16) zero-ref    multireg-ret ld-addr-op "NewObj constructor temp" <System.IO.Hashing.XxHash128+Hash128>
 ;* V16 tmp6         [V16    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V17 tmp7         [V17    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V18 tmp8         [V18    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V19 tmp9         [V19    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V20 tmp10        [V20    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V21 tmp11        [V21    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V22 tmp12        [V22    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V23 tmp13        [V23    ] (  0,  0   )     int  ->  zero-ref    "Inlining Arg"
 ;* V24 tmp14        [V24    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V25 tmp15        [V25    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V26 tmp16        [V26    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V27 tmp17        [V27    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
-;  V28 tmp18        [V28,T04] (  3,  6   )    long  ->  rax         "Inlining Arg"
-;  V29 tmp19        [V29,T05] (  3,  6   )    long  ->  rdx         "Inlining Arg"
+;  V28 tmp18        [V28,T04] (  3,  6   )    long  ->  rdx         "Inlining Arg"
+;  V29 tmp19        [V29,T05] (  3,  6   )    long  ->  rax         "Inlining Arg"
 ;* V30 tmp20        [V30    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V31 tmp21        [V31    ] (  0,  0   )    long  ->  zero-ref    "field V15.Low64 (fldOffset=0x0)" P-INDEP
 ;* V32 tmp22        [V32    ] (  0,  0   )    long  ->  zero-ref    "field V15.High64 (fldOffset=0x8)" P-INDEP
 ;* V33 tmp23        [V33    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V21.Item1 (fldOffset=0x0)" P-DEP
 ;* V34 tmp24        [V34    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V21.Item2 (fldOffset=0x8)" P-DEP
-;  V35 tmp25        [V35,T14] (  2,  2   )    long  ->  rax         "field V22.Item1 (fldOffset=0x0)" P-INDEP
-;  V36 tmp26        [V36,T15] (  2,  2   )    long  ->  rdx         "field V22.Item2 (fldOffset=0x8)" P-INDEP
+;  V35 tmp25        [V35,T14] (  2,  2   )    long  ->  rdx         "field V22.Item1 (fldOffset=0x0)" P-INDEP
+;  V36 tmp26        [V36,T15] (  2,  2   )    long  ->  rax         "field V22.Item2 (fldOffset=0x8)" P-INDEP
 ;* V37 tmp27        [V37    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V26.Item1 (fldOffset=0x0)" P-DEP
 ;* V38 tmp28        [V38    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V26.Item2 (fldOffset=0x8)" P-DEP
-;  V39 tmp29        [V39,T09] (  3,  3   )    long  ->  rax         "field V27.Item1 (fldOffset=0x0)" P-INDEP
-;  V40 tmp30        [V40,T16] (  2,  2   )    long  ->  rdx         "field V27.Item2 (fldOffset=0x8)" P-INDEP
+;  V39 tmp29        [V39,T09] (  3,  3   )    long  ->  rdx         "field V27.Item1 (fldOffset=0x0)" P-INDEP
+;  V40 tmp30        [V40,T16] (  2,  2   )    long  ->  rcx         "field V27.Item2 (fldOffset=0x8)" P-INDEP
 ;
 ; Lcl frame size = 16
 
 G_M25789_IG01:
        push     rbp
        sub      rsp, 16
        lea      rbp, [rsp+0x10]
 						;; size=10 bbWeight=1 PerfScore 1.75
 G_M25789_IG02:
        mov      rax, rdx
        neg      rax
        mov      rcx, 0xD1FFAB1E
        add      rax, rcx
        mov      rcx, 0xD1FFAB1E
        add      rcx, rdx
        mov      rdx, qword ptr [rdi]
        mov      r8d, esi
        mov      rdi, qword ptr [rdi+r8-0x08]
        xor      rdx, rdi
-       xor      rax, rdx
-       mov      rdx, 0xD1FFAB1E
-       mul      rdx:rax, rdx
+       xor      rdx, rax
+       mov      rax, 0xD1FFAB1E
+       mulx     rax, rdx, rax
        dec      esi
        shl      rsi, 54
-       add      rax, rsi
+       add      rdx, rsi
        xor      rdi, rcx
-       add      rdx, rdi
+       add      rax, rdi
        mov      ecx, edi
        mov      edi, 0xD1FFAB1E
        imul     rcx, rdi
-       add      rdx, rcx
-       mov      qword ptr [rbp-0x08], rdx
-       mov      rcx, rdx
+       add      rax, rcx
+       mov      rcx, rax
        bswap    rcx
-       xor      rax, rcx
+       xor      rdx, rcx
        mov      rcx, 0xD1FFAB1E
-       mul      rdx:rax, rcx
-       imul     rcx, qword ptr [rbp-0x08]
-       add      rdx, rcx
-       mov      rcx, rax
-       shr      rcx, 37
-       xor      rcx, rax
-       mov      rax, 0xD1FFAB1E
-       imul     rax, rcx
-       mov      rcx, rax
-       shr      rcx, 32
-       xor      rax, rcx
+       mulx     rcx, rdx, rcx
+       mov      rdi, 0xD1FFAB1E
+       imul     rax, rdi
+       add      rax, rcx
        mov      rcx, rdx
        shr      rcx, 37
        xor      rcx, rdx
        mov      rdx, 0xD1FFAB1E
        imul     rdx, rcx
        mov      rcx, rdx
        shr      rcx, 32
-       xor      rdx, rcx
-						;; size=193 bbWeight=1 PerfScore 32.25
+       xor      rcx, rdx
+       mov      rdx, rax
+       shr      rdx, 37
+       xor      rdx, rax
+       mov      rax, 0xD1FFAB1E
+       imul     rax, rdx
+       mov      rdx, rax
+       shr      rdx, 32
+       xor      rax, rdx
+       mov      qword ptr [rbp-0x08], rax
+       mov      rax, rcx
+       mov      rdx, qword ptr [rbp-0x08]
+						;; size=213 bbWeight=1 PerfScore 31.75
 G_M25789_IG03:
        add      rsp, 16
        pop      rbp
        ret      
 						;; size=6 bbWeight=1 PerfScore 1.75
 
-; Total bytes of code 209, prolog size 10, PerfScore 35.75, instruction count 52, allocated bytes for code 209 (MethodHash=aca99b42) for method System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
+; Total bytes of code 229, prolog size 10, PerfScore 35.25, instruction count 55, allocated bytes for code 229 (MethodHash=aca99b42) for method System.IO.Hashing.XxHash128:HashLength9To16(ptr,uint,ulong):System.IO.Hashing.XxHash128+Hash128 (FullOpts)
 ; ============================================================
    5 (21.74 % of base) - System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong 
     ; Assembly listing for method System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rsp based frame
 ; partially interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 2 single block inlinees; 3 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T00] (  4,  4   )    long  ->  rdi         single-def
 ;  V01 arg1         [V01,T02] (  3,  3   )    long  ->  rsi         single-def
 ;  V02 arg2         [V02,T03] (  3,  3   )    long  ->  rdx         single-def
 ;  V03 arg3         [V03,T01] (  4,  4   )    long  ->  rcx         single-def
 ;# V04 OutArgs      [V04    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V05 tmp1         [V05    ] (  0,  0   )    long  ->  zero-ref    "impAppendStmt"
 ;* V06 tmp2         [V06    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V07 tmp3         [V07    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V08 tmp4         [V08    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V09 tmp5         [V09    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V10 tmp6         [V10    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V11 tmp7         [V11    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V12 tmp8         [V12    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V13 tmp9         [V13    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V14 tmp10        [V14    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V15 tmp11        [V15    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V13.Item1 (fldOffset=0x0)" P-DEP
 ;* V16 tmp12        [V16    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V13.Item2 (fldOffset=0x8)" P-DEP
 ;  V17 tmp13        [V17,T04] (  2,  2   )    long  ->  rax         "field V14.Item1 (fldOffset=0x0)" P-INDEP
-;  V18 tmp14        [V18,T05] (  2,  2   )    long  ->  rdx         "field V14.Item2 (fldOffset=0x8)" P-INDEP
+;  V18 tmp14        [V18,T05] (  2,  2   )    long  ->  rcx         "field V14.Item2 (fldOffset=0x8)" P-INDEP
 ;
 ; Lcl frame size = 0
 
 G_M9319_IG01:
 						;; size=0 bbWeight=1 PerfScore 0.00
 G_M9319_IG02:
        add      rsi, rcx
        xor      rsi, qword ptr [rdi]
        sub      rdx, rcx
        xor      rdx, qword ptr [rdi+0x08]
        mov      rax, rdx
-       mul      rdx:rax, rsi
-       xor      rax, rdx
-						;; size=22 bbWeight=1 PerfScore 8.00
+       mov      rdx, rsi
+       mulx     rcx, rax, rax
+       xor      rax, rcx
+						;; size=27 bbWeight=1 PerfScore 8.25
 G_M9319_IG03:
        ret      
 						;; size=1 bbWeight=1 PerfScore 1.00
 
-; Total bytes of code 23, prolog size 0, PerfScore 9.00, instruction count 8, allocated bytes for code 23 (MethodHash=e8a4db98) for method System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
+; Total bytes of code 28, prolog size 0, PerfScore 9.25, instruction count 9, allocated bytes for code 28 (MethodHash=e8a4db98) for method System.IO.Hashing.XxHashShared:Mix16Bytes(ptr,ulong,ulong,ulong):ulong (FullOpts)
 ; ============================================================

    Note: some changes were skipped as they were too large to fit into a comment.

    Larger list of diffs: https://gist.github.com/MihuBot/42a04261be210aed402c117db262e085

  2. MihuBot commented on Sep 4, 2026

    @MihuBot
    MihuBot
    on Sep 4, 2026
    OwnerAuthor

    Top method improvements

    -64 (-28.44 % of base) - System.Decimal+DecCalc:VarDecCmpSub(byref,byref):int 
     ; Assembly listing for method System.Decimal+DecCalc:VarDecCmpSub(byref,byref):int (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 6 single block inlinees; 1 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T09] (  5,  5   )   byref  ->  rdi         single-def
 ;  V01 arg1         [V01,T10] (  5,  5   )   byref  ->  rsi         single-def
-;  V02 loc0         [V02,T13] (  7,  4.50)     int  ->  [rbp-0x04] 
-;  V03 loc1         [V03,T12] (  8,  5.25)     int  ->  rax        
+;  V02 loc0         [V02,T13] (  7,  4.50)     int  ->  rax        
+;  V03 loc1         [V03,T12] (  8,  5.25)     int  ->  rdx        
 ;  V04 loc2         [V04,T04] (  7, 11   )    long  ->  registers   ld-addr-op
 ;  V05 loc3         [V05,T05] (  7, 11   )     int  ->  registers  
 ;  V06 loc4         [V06,T14] (  4,  2.50)    long  ->  registers  
 ;  V07 loc5         [V07,T15] (  4,  2.50)     int  ->  registers  
-;  V08 loc6         [V08,T18] (  3,  1.50)     int  ->  rax        
-;  V09 loc7         [V09,T19] (  3,  1.50)    long  ->  rax        
+;  V08 loc6         [V08,T18] (  3,  1.50)     int  ->  rdx        
+;  V09 loc7         [V09,T19] (  3,  1.50)    long  ->  rdx        
 ;* V10 loc8         [V10    ] (  0,  0   )     int  ->  zero-ref   
 ;  V11 loc9         [V11,T02] (  3, 12   )    long  ->  rdi        
 ;* V12 loc10        [V12    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.ReadOnlySpan`1[uint]>
 ;# V13 OutArgs      [V13    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V14 tmp1         [V14,T11] (  3,  6   )     int  ->  rax         "dup spill"
-;  V15 tmp2         [V15,T06] (  3,  8   )     int  ->  rax        
+;  V14 tmp1         [V14,T11] (  3,  6   )     int  ->  rdx         "dup spill"
+;  V15 tmp2         [V15,T06] (  3,  8   )     int  ->  rdx        
 ;  V16 tmp3         [V16,T01] (  2, 16   )     int  ->   r9         "dup spill"
 ;  V17 tmp4         [V17,T16] (  2,  2   )    long  ->  rcx         "impAppendStmt"
 ;  V18 tmp5         [V18,T17] (  2,  2   )     int  ->  rdi         "impSpillLclRefs"
 ;* V19 tmp6         [V19    ] (  0,  0   )  struct (16) zero-ref    "ReadOnlySpan<T> for CreateSpan<T>" <System.ReadOnlySpan`1[uint]>
 ;* V20 tmp7         [V20    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V21 tmp8         [V21    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V22 tmp9         [V22    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V23 tmp10        [V23    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V24 tmp11        [V24    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V25 tmp12        [V25    ] (  0,  0   )   byref  ->  zero-ref    "field V12._reference (fldOffset=0x0)" P-INDEP
 ;* V26 tmp13        [V26    ] (  0,  0   )     int  ->  zero-ref    "field V12._length (fldOffset=0x8)" P-INDEP
 ;* V27 tmp14        [V27    ] (  0,  0   )   byref  ->  zero-ref    "field V19._reference (fldOffset=0x0)" P-INDEP
 ;* V28 tmp15        [V28    ] (  0,  0   )     int  ->  zero-ref    "field V19._length (fldOffset=0x8)" P-INDEP
 ;* V29 tmp16        [V29    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V23.Item1 (fldOffset=0x0)" P-DEP
 ;* V30 tmp17        [V30    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V23.Item2 (fldOffset=0x8)" P-DEP
 ;  V31 tmp18        [V31,T07] (  2,  8   )    long  ->  rcx         "field V24.Item1 (fldOffset=0x0)" P-INDEP
 ;  V32 tmp19        [V32,T08] (  2,  8   )    long  ->  rdx         "field V24.Item2 (fldOffset=0x8)" P-INDEP
 ;  V33 cse0         [V33,T03] (  3, 12   )    long  ->  r10         "CSE #01: aggressive"
 ;  V34 rat0         [V34,T00] (  6, 18.75)    long  ->   r9         "Widened IV V03"
 ;
-; Lcl frame size = 16
+; Lcl frame size = 0
 
 G_M9821_IG01:
        push     rbp
-       sub      rsp, 16
-       lea      rbp, [rsp+0x10]
-						;; size=10 bbWeight=1 PerfScore 1.75
+       mov      rbp, rsp
+						;; size=4 bbWeight=1 PerfScore 1.25
 G_M9821_IG02:
-       mov      eax, dword ptr [rsi]
-       mov      edx, eax
-       sar      edx, 31
-       or       edx, 1
-       sub      eax, dword ptr [rdi]
+       mov      edx, dword ptr [rsi]
+       mov      eax, edx
+       sar      eax, 31
+       or       eax, 1
+       sub      edx, dword ptr [rdi]
        mov      rcx, qword ptr [rdi+0x08]
        mov      edi, dword ptr [rdi+0x04]
        mov      r8, qword ptr [rsi+0x08]
        mov      esi, dword ptr [rsi+0x04]
-       test     eax, eax
-       jne      SHORT G_M9821_IG06
+       test     edx, edx
+       je       SHORT G_M9821_IG09
 						;; size=30 bbWeight=1 PerfScore 14.25
 G_M9821_IG03:
-       mov      dword ptr [rbp-0x04], edx
-						;; size=3 bbWeight=0.50 PerfScore 0.50
-G_M9821_IG04:
-       mov      eax, edi
-       sub      eax, esi
-       je       G_M9821_IG13
-       cmp      eax, edi
-       jbe      G_M9821_IG16
-						;; size=18 bbWeight=0.50 PerfScore 1.38
-G_M9821_IG05:
-       mov      edx, dword ptr [rbp-0x04]
+       sar      edx, 16
+       jns      SHORT G_M9821_IG04
        neg      edx
-       jmp      G_M9821_IG18
-						;; size=10 bbWeight=0.50 PerfScore 1.62
-G_M9821_IG06:
-       sar      eax, 16
-       jns      SHORT G_M9821_IG07
        neg      eax
-       neg      edx
-       mov      dword ptr [rbp-0x04], edx
        mov      r9, rcx
        mov      rcx, r8
        mov      r8, r9
        mov      r9d, esi
        mov      esi, edi
        mov      edi, r9d
-       mov      edx, dword ptr [rbp-0x04]
-						;; size=32 bbWeight=0.50 PerfScore 2.75
+						;; size=26 bbWeight=0.50 PerfScore 1.75
+G_M9821_IG04:
+       mov      r9d, edx
+       align    [0 bytes for IG05]
+						;; size=3 bbWeight=0.75 PerfScore 0.19
+G_M9821_IG05:
+       cmp      r9d, 9
+       jb       SHORT G_M9821_IG07
+						;; size=6 bbWeight=4 PerfScore 5.00
+G_M9821_IG06:
+       mov      edx, 0xD1FFAB1E
+       jmp      SHORT G_M9821_IG08
+						;; size=7 bbWeight=2 PerfScore 4.50
 G_M9821_IG07:
-       mov      r9d, eax
-       jmp      SHORT G_M9821_IG11
-						;; size=5 bbWeight=0.75 PerfScore 1.69
+       mov      rdx, 0xD1FFAB1E      ; static handle
+       mov      edx, dword ptr [rdx+4*r9]
+						;; size=14 bbWeight=2 PerfScore 4.50
 G_M9821_IG08:
-       mov      rax, 0xD1FFAB1E      ; static handle
-       mov      eax, dword ptr [rax+4*r9]
-       mov      dword ptr [rbp-0x04], edx
-						;; size=17 bbWeight=2 PerfScore 6.50
-G_M9821_IG09:
-       mov      r10d, eax
-       mov      rax, r10
-       mul      rdx:rax, rcx
-       mov      rcx, rax
+       mov      r10d, edx
+       mov      rdx, r10
+       mulx     rdx, rcx, rcx
        mov      edi, edi
        imul     rdi, r10
        add      rdi, rdx
-       mov      rax, rdi
-       shr      rax, 32
-       jne      SHORT G_M9821_IG17
+       mov      rdx, rdi
+       shr      rdx, 32
+       jne      SHORT G_M9821_IG13
        add      r9d, -9
        test     r9d, r9d
-       jle      SHORT G_M9821_IG04
-						;; size=39 bbWeight=4 PerfScore 38.00
+       jg       SHORT G_M9821_IG05
+						;; size=38 bbWeight=4 PerfScore 37.00
+G_M9821_IG09:
+       mov      edx, edi
+       sub      edx, esi
+       jne      SHORT G_M9821_IG11
+       mov      rdx, rcx
+       sub      rdx, r8
+       je       SHORT G_M9821_IG10
+       cmp      rdx, rcx
+       jbe      SHORT G_M9821_IG13
+       jmp      SHORT G_M9821_IG12
+						;; size=21 bbWeight=0.50 PerfScore 3.12
 G_M9821_IG10:
-       mov      edx, dword ptr [rbp-0x04]
-						;; size=3 bbWeight=2 PerfScore 2.00
-G_M9821_IG11:
-       cmp      r9d, 9
-       jb       SHORT G_M9821_IG08
-						;; size=6 bbWeight=4 PerfScore 5.00
-G_M9821_IG12:
-       mov      eax, 0xD1FFAB1E
-       mov      dword ptr [rbp-0x04], edx
-       jmp      SHORT G_M9821_IG09
-						;; size=10 bbWeight=2 PerfScore 6.50
-G_M9821_IG13:
-       mov      rax, rcx
-       sub      rax, r8
-       je       SHORT G_M9821_IG15
-       cmp      rax, rcx
-       ja       G_M9821_IG05
-						;; size=17 bbWeight=0.50 PerfScore 1.38
-G_M9821_IG14:
-       mov      edx, dword ptr [rbp-0x04]
-       jmp      SHORT G_M9821_IG18
-						;; size=5 bbWeight=0.25 PerfScore 0.75
-G_M9821_IG15:
-       xor      edx, edx
-       jmp      SHORT G_M9821_IG18
+       xor      eax, eax
+       jmp      SHORT G_M9821_IG13
 						;; size=4 bbWeight=0.50 PerfScore 1.12
-G_M9821_IG16:
-       mov      edx, dword ptr [rbp-0x04]
-       jmp      SHORT G_M9821_IG18
-						;; size=5 bbWeight=0.25 PerfScore 0.75
-G_M9821_IG17:
-       mov      edx, dword ptr [rbp-0x04]
-						;; size=3 bbWeight=2 PerfScore 2.00
-G_M9821_IG18:
-       mov      eax, edx
-						;; size=2 bbWeight=1 PerfScore 0.25
-G_M9821_IG19:
-       add      rsp, 16
+G_M9821_IG11:
+       cmp      edx, edi
+       jbe      SHORT G_M9821_IG13
+						;; size=4 bbWeight=0.50 PerfScore 0.62
+G_M9821_IG12:
+       neg      eax
+						;; size=2 bbWeight=0.50 PerfScore 0.12
+G_M9821_IG13:
        pop      rbp
        ret      
-						;; size=6 bbWeight=1 PerfScore 1.75
+						;; size=2 bbWeight=1 PerfScore 1.50
 
-; Total bytes of code 225, prolog size 10, PerfScore 89.94, instruction count 75, allocated bytes for code 225 (MethodHash=418ad9a2) for method System.Decimal+DecCalc:VarDecCmpSub(byref,byref):int (FullOpts)
+; Total bytes of code 161, prolog size 4, PerfScore 74.94, instruction count 59, allocated bytes for code 161 (MethodHash=418ad9a2) for method System.Decimal+DecCalc:VarDecCmpSub(byref,byref):int (FullOpts)
 ; ============================================================
    -38 (-21.23 % of base) - System.Number:ComputeProductApproximation(int,long,ulong):System.ValueTuple`2[ulong,ulong] 
     ; Assembly listing for method System.Number:ComputeProductApproximation(int,long,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; partially interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 3 single block inlinees; 2 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T00] (  4,  3.50)     int  ->  rdi         single-def
 ;  V01 arg1         [V01,T02] (  3,  3   )    long  ->  rsi         single-def
-;  V02 arg2         [V02,T01] (  4,  3.50)    long  ->  [rbp-0x08]  single-def
-;  V03 loc0         [V03,T04] (  4,  3.50)     int  ->  rcx        
-;  V04 loc1         [V04,T03] (  5,  4   )    long  ->   r8        
-;  V05 loc2         [V05,T05] (  4,  3   )    long  ->  rsi         ld-addr-op
+;  V02 arg2         [V02,T01] (  4,  3.50)    long  ->  rdx         single-def
+;  V03 loc0         [V03,T04] (  4,  3.50)     int  ->  rax        
+;  V04 loc1         [V04,T03] (  5,  4   )    long  ->   r9        
+;  V05 loc2         [V05,T05] (  4,  3   )    long  ->   r8         ld-addr-op
 ;* V06 loc3         [V06    ] (  0,  0   )    long  ->  zero-ref   
 ;* V07 loc4         [V07    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.ReadOnlySpan`1[ulong]>
 ;* V08 loc5         [V08    ] (  0,  0   )    long  ->  zero-ref   
 ;* V09 loc6         [V09    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op
 ;* V10 loc7         [V10    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op <System.ReadOnlySpan`1[ulong]>
 ;# V11 OutArgs      [V11    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;  V12 tmp1         [V12,T06] (  4,  3   )    long  ->  rdi        
 ;* V13 tmp2         [V13    ] (  0,  0   )  struct (16) zero-ref    multireg-ret ld-addr-op "NewObj constructor temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V14 tmp3         [V14    ] (  0,  0   )  struct (16) zero-ref    "ReadOnlySpan<T> for CreateSpan<T>" <System.ReadOnlySpan`1[ulong]>
 ;* V15 tmp4         [V15    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V16 tmp5         [V16    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V17 tmp6         [V17    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V18 tmp7         [V18    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V19 tmp8         [V19    ] (  0,  0   )  struct (16) zero-ref    "ReadOnlySpan<T> for CreateSpan<T>" <System.ReadOnlySpan`1[ulong]>
 ;* V20 tmp9         [V20    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V21 tmp10        [V21    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V22 tmp11        [V22    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V23 tmp12        [V23    ] (  0,  0   )  struct (16) zero-ref    "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V24 tmp13        [V24    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V25 tmp14        [V25    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V07._reference (fldOffset=0x0)" P-INDEP
 ;* V26 tmp15        [V26    ] (  0,  0   )     int  ->  zero-ref    "field V07._length (fldOffset=0x8)" P-INDEP
 ;* V27 tmp16        [V27    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V10._reference (fldOffset=0x0)" P-INDEP
 ;* V28 tmp17        [V28    ] (  0,  0   )     int  ->  zero-ref    "field V10._length (fldOffset=0x8)" P-INDEP
 ;* V29 tmp18        [V29    ] (  0,  0   )    long  ->  zero-ref    "field V13.Item1 (fldOffset=0x0)" P-INDEP
 ;* V30 tmp19        [V30    ] (  0,  0   )    long  ->  zero-ref    "field V13.Item2 (fldOffset=0x8)" P-INDEP
 ;* V31 tmp20        [V31    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V14._reference (fldOffset=0x0)" P-INDEP
 ;* V32 tmp21        [V32    ] (  0,  0   )     int  ->  zero-ref    "field V14._length (fldOffset=0x8)" P-INDEP
 ;* V33 tmp22        [V33    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V17.Item1 (fldOffset=0x0)" P-DEP
 ;* V34 tmp23        [V34    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V17.Item2 (fldOffset=0x8)" P-DEP
-;  V35 tmp24        [V35,T07] (  3,  2.50)    long  ->  [rbp-0x10]  spill-single-def "field V18.Item1 (fldOffset=0x0)" P-INDEP
-;  V36 tmp25        [V36,T08] (  3,  2.50)    long  ->  [rbp-0x18]  spill-single-def "field V18.Item2 (fldOffset=0x8)" P-INDEP
+;  V35 tmp24        [V35,T07] (  3,  2.50)    long  ->  rcx         "field V18.Item1 (fldOffset=0x0)" P-INDEP
+;  V36 tmp25        [V36,T08] (  3,  2.50)    long  ->  rsi         "field V18.Item2 (fldOffset=0x8)" P-INDEP
 ;* V37 tmp26        [V37    ] (  0,  0   )   byref  ->  zero-ref    single-def "field V19._reference (fldOffset=0x0)" P-INDEP
 ;* V38 tmp27        [V38    ] (  0,  0   )     int  ->  zero-ref    "field V19._length (fldOffset=0x8)" P-INDEP
 ;  V39 tmp28        [V39,T11] (  1,  0.50)    long  ->  rax         "field V22.Item1 (fldOffset=0x0)" P-INDEP
 ;  V40 tmp29        [V40,T09] (  3,  1.50)    long  ->  rdx         "field V22.Item2 (fldOffset=0x8)" P-INDEP
 ;* V41 tmp30        [V41    ] (  0,  0   )    long  ->  zero-ref    "field V23.Item1 (fldOffset=0x0)" P-INDEP
 ;* V42 tmp31        [V42    ] (  0,  0   )    long  ->  zero-ref    "field V23.Item2 (fldOffset=0x8)" P-INDEP
-;  V43 cse0         [V43,T10] (  3,  1.50)     int  ->  rcx         "CSE #01: moderate"
+;  V43 cse0         [V43,T10] (  3,  1.50)     int  ->  rax         "CSE #01: moderate"
 ;
-; Lcl frame size = 32
+; Lcl frame size = 0
 
 G_M1078_IG01:
        push     rbp
-       sub      rsp, 32
-       lea      rbp, [rsp+0x20]
-       mov      rax, rdx
-						;; size=13 bbWeight=1 PerfScore 2.00
+       mov      rbp, rsp
+						;; size=4 bbWeight=1 PerfScore 1.25
 G_M1078_IG02:
-       lea      ecx, [2*rsi+0x2AC]
-       cmp      ecx, 0x516
-       jae      G_M1078_IG09
-       mov      edx, ecx
+       lea      eax, [2*rsi+0x2AC]
+       cmp      eax, 0x516
+       jae      SHORT G_M1078_IG09
+       mov      ecx, eax
        mov      rsi, 0xD1FFAB1E      ; static handle
-       mov      qword ptr [rbp-0x08], rax
-       mul      rdx:rax, qword ptr [rsi+8*rdx]
-       mov      qword ptr [rbp-0x10], rax
-       mov      qword ptr [rbp-0x18], rdx
-       mov      rsi, rax
-       mov      r8, rdx
+       mulx     rsi, rcx, qword ptr [rsi+8*rcx]
+       mov      r8, rcx
+       mov      r9, rsi
        cmp      edi, 64
        jge      SHORT G_M1078_IG04
-						;; size=58 bbWeight=1 PerfScore 13.00
+						;; size=43 bbWeight=1 PerfScore 10.00
 G_M1078_IG03:
-       mov      r9, -1
-       shrx     rdi, r9, rdi
+       mov      r10, -1
+       shrx     rdi, r10, rdi
        jmp      SHORT G_M1078_IG05
 						;; size=17 bbWeight=0.50 PerfScore 1.38
 G_M1078_IG04:
        mov      rdi, -1
 						;; size=10 bbWeight=0.50 PerfScore 0.12
 G_M1078_IG05:
-       mov      r9, r8
-       and      r9, rdi
-       cmp      r9, rdi
+       mov      r10, r9
+       and      r10, rdi
+       cmp      r10, rdi
        jne      SHORT G_M1078_IG07
 						;; size=11 bbWeight=1 PerfScore 1.75
 G_M1078_IG06:
-       inc      ecx
-       cmp      ecx, 0x516
+       inc      eax
+       cmp      eax, 0x516
        jae      SHORT G_M1078_IG09
-       mov      esi, ecx
-       mov      rcx, 0xD1FFAB1E      ; static handle
-       mov      rax, qword ptr [rbp-0x08]
-       mul      rdx:rax, qword ptr [rcx+8*rsi]
-       mov      rax, qword ptr [rbp-0x10]
-       lea      rsi, [rax+rdx]
-       mov      rax, qword ptr [rbp-0x18]
-       inc      rax
-       cmp      rdx, rsi
-       cmova    r8, rax
-						;; size=52 bbWeight=0.50 PerfScore 6.25
+       mov      r8d, eax
+       mov      rax, 0xD1FFAB1E      ; static handle
+       mulx     rdx, rax, qword ptr [rax+8*r8]
+       lea      r8, [rcx+rdx]
+       inc      rsi
+       cmp      rdx, r8
+       cmova    r9, rsi
+						;; size=42 bbWeight=0.50 PerfScore 4.75
 G_M1078_IG07:
-       mov      rax, r8
-       mov      rdx, rsi
+       mov      rax, r9
+       mov      rdx, r8
 						;; size=6 bbWeight=1 PerfScore 0.50
 G_M1078_IG08:
-       add      rsp, 32
        pop      rbp
        ret      
-						;; size=6 bbWeight=1 PerfScore 1.75
+						;; size=2 bbWeight=1 PerfScore 1.50
 G_M1078_IG09:
        call     CORINFO_HELP_RNGCHKFAIL
        int3     
 						;; size=6 bbWeight=0 PerfScore 0.00
 
-; Total bytes of code 179, prolog size 10, PerfScore 26.75, instruction count 45, allocated bytes for code 179 (MethodHash=9db2fbc9) for method System.Number:ComputeProductApproximation(int,long,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
+; Total bytes of code 141, prolog size 4, PerfScore 21.25, instruction count 36, allocated bytes for code 141 (MethodHash=9db2fbc9) for method System.Number:ComputeProductApproximation(int,long,ulong):System.ValueTuple`2[ulong,ulong] (FullOpts)
 ; ============================================================
    -31 (-6.98 % of base) - System.IO.Hashing.XxHash3:HashLength0To16(ptr,uint,ulong):ulong 
     ; Assembly listing for method System.IO.Hashing.XxHash3:HashLength0To16(ptr,uint,ulong):ulong (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; partially interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 12 single block inlinees; 5 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T04] (  9,  5.50)    long  ->  rdi         single-def
 ;  V01 arg1         [V01,T03] ( 10,  6.50)     int  ->  rsi         single-def
 ;  V02 arg2         [V02,T05] (  8,  5   )    long  ->  rdx         single-def
 ;# V03 OutArgs      [V03    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
-;  V04 tmp1         [V04,T10] (  2,  1   )    long  ->  rcx         "Inline stloc first use temp"
-;  V05 tmp2         [V05,T11] (  2,  1   )    long  ->   r8         "Inline stloc first use temp"
-;  V06 tmp3         [V06,T08] (  3,  1.50)    long  ->  rcx         "Inline stloc first use temp"
-;  V07 tmp4         [V07,T09] (  3,  1.50)    long  ->   r8         "Inline stloc first use temp"
+;  V04 tmp1         [V04,T10] (  2,  1   )    long  ->  rax         "Inline stloc first use temp"
+;  V05 tmp2         [V05,T11] (  2,  1   )    long  ->  rdx         "Inline stloc first use temp"
+;  V06 tmp3         [V06,T08] (  3,  1.50)    long  ->  rax         "Inline stloc first use temp"
+;  V07 tmp4         [V07,T09] (  3,  1.50)    long  ->  rdx         "Inline stloc first use temp"
 ;* V08 tmp5         [V08    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V09 tmp6         [V09    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V10 tmp7         [V10    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V11 tmp8         [V11    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V12 tmp9         [V12    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V13 tmp10        [V13    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V14 tmp11        [V14    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V15 tmp12        [V15    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;  V16 tmp13        [V16,T06] (  6,  6   )    long  ->  rax         "Inlining Arg"
 ;* V17 tmp14        [V17    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V18 tmp15        [V18    ] (  0,  0   )     int  ->  zero-ref    "Inline stloc first use temp"
 ;* V19 tmp16        [V19    ] (  0,  0   )    long  ->  zero-ref    "Inline stloc first use temp"
 ;* V20 tmp17        [V20    ] (  0,  0   )     int  ->  zero-ref    "Inline return value spill temp"
 ;* V21 tmp18        [V21    ] (  0,  0   )     int  ->  zero-ref    "Inline return value spill temp"
 ;* V22 tmp19        [V22    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;  V23 tmp20        [V23,T00] ( 10, 10   )    long  ->  rax         "Inlining Arg"
 ;* V24 tmp21        [V24    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline stloc first use temp"
 ;* V25 tmp22        [V25    ] (  0,  0   )     int  ->  zero-ref    "impAppendStmt"
 ;* V26 tmp23        [V26    ] (  0,  0   )   ubyte  ->  zero-ref    "Inline stloc first use temp"
 ;  V27 tmp24        [V27,T01] (  9,  9   )    long  ->  rax         "Inlining Arg"
 ;  V28 tmp25        [V28,T02] (  9,  9   )    long  ->  rax         "Inlining Arg"
 ;* V29 tmp26        [V29    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V14.Item1 (fldOffset=0x0)" P-DEP
 ;* V30 tmp27        [V30    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V14.Item2 (fldOffset=0x8)" P-DEP
-;  V31 tmp28        [V31,T12] (  2,  1   )    long  ->  rax         "field V15.Item1 (fldOffset=0x0)" P-INDEP
-;  V32 tmp29        [V32,T13] (  2,  1   )    long  ->  rdx         "field V15.Item2 (fldOffset=0x8)" P-INDEP
-;  V33 cse0         [V33,T07] (  6,  3   )    long  ->  [rbp-0x08]  multi-def "CSE #01: aggressive"
+;  V31 tmp28        [V31,T12] (  2,  1   )    long  ->  rdi         "field V15.Item1 (fldOffset=0x0)" P-INDEP
+;  V32 tmp29        [V32,T13] (  2,  1   )    long  ->  rsi         "field V15.Item2 (fldOffset=0x8)" P-INDEP
+;  V33 cse0         [V33,T07] (  6,  3   )    long  ->  rcx         multi-def "CSE #01: aggressive"
 ;
-; Lcl frame size = 16
+; Lcl frame size = 0
 
 G_M20087_IG01:
        push     rbp
-       sub      rsp, 16
-       lea      rbp, [rsp+0x10]
-						;; size=10 bbWeight=1 PerfScore 1.75
+       mov      rbp, rsp
+						;; size=4 bbWeight=1 PerfScore 1.25
 G_M20087_IG02:
        cmp      esi, 8
        ja       G_M20087_IG09
 						;; size=9 bbWeight=1 PerfScore 1.25
 G_M20087_IG03:
        cmp      esi, 4
        jae      G_M20087_IG07
        test     esi, esi
        jne      SHORT G_M20087_IG05
        mov      rax, 0xD1FFAB1E
        xor      rax, rdx
        mov      rdi, rax
        shr      rdi, 33
        xor      rdi, rax
        mov      rax, 0xD1FFAB1E
        imul     rax, rdi
        mov      rsi, rax
        shr      rsi, 29
        xor      rsi, rax
        mov      rax, 0xD1FFAB1E
        imul     rax, rsi
        mov      rdx, rax
        shr      rdx, 32
        xor      rax, rdx
 						;; size=84 bbWeight=0.50 PerfScore 5.25
 G_M20087_IG04:
-       add      rsp, 16
        pop      rbp
        ret      
-						;; size=6 bbWeight=0.50 PerfScore 0.88
+						;; size=2 bbWeight=0.50 PerfScore 0.75
 G_M20087_IG05:
        movzx    rax, byte  ptr [rdi]
        shl      eax, 16
        mov      ecx, esi
        shr      ecx, 1
        movzx    rcx, byte  ptr [rdi+rcx]
        shl      ecx, 24
        or       eax, ecx
        lea      ecx, [rsi-0x01]
        movzx    rdi, byte  ptr [rdi+rcx]
        or       eax, edi
        shl      esi, 8
        or       eax, esi
        mov      ecx, 0xD1FFAB1E
        add      rcx, rdx
        xor      rax, rcx
        mov      rdx, rax
        shr      rdx, 33
        xor      rdx, rax
        mov      rax, 0xD1FFAB1E
        imul     rax, rdx
        mov      rdx, rax
        shr      rdx, 29
        xor      rdx, rax
        mov      rax, 0xD1FFAB1E
        imul     rax, rdx
        mov      rdx, rax
        shr      rdx, 32
        xor      rax, rdx
 						;; size=103 bbWeight=0.50 PerfScore 8.88
 G_M20087_IG06:
-       add      rsp, 16
        pop      rbp
        ret      
-						;; size=6 bbWeight=0.50 PerfScore 0.88
+						;; size=2 bbWeight=0.50 PerfScore 0.75
 G_M20087_IG07:
        mov      eax, edx
        bswap    eax
        shl      rax, 32
        xor      rax, rdx
        neg      rax
        mov      rdx, 0xD1FFAB1E
        add      rax, rdx
        mov      ecx, esi
        mov      esi, dword ptr [rdi+rcx-0x04]
        mov      edi, dword ptr [rdi]
        shl      rdi, 32
        add      rdi, rsi
        xor      rax, rdi
        rorx     rdx, rax, 15
        xor      rdx, rax
        rol      rax, 24
        xor      rax, rdx
        mov      rdx, 0xD1FFAB1E
        imul     rax, rdx
        mov      rdx, rax
        shr      rdx, 35
        add      rcx, rdx
        xor      rcx, rax
        mov      rax, 0xD1FFAB1E
        imul     rax, rcx
        mov      rdx, rax
        shr      rdx, 28
        xor      rax, rdx
 						;; size=112 bbWeight=0.50 PerfScore 7.88
 G_M20087_IG08:
-       add      rsp, 16
        pop      rbp
        ret      
-						;; size=6 bbWeight=0.50 PerfScore 0.88
+						;; size=2 bbWeight=0.50 PerfScore 0.75
 G_M20087_IG09:
+       mov      rax, 0xD1FFAB1E
+       add      rax, rdx
+       neg      rdx
        mov      rcx, 0xD1FFAB1E
-       add      rcx, rdx
-       mov      r8, rdx
-       neg      r8
-       mov      r9, 0xD1FFAB1E
-       add      r8, r9
-       xor      rcx, qword ptr [rdi]
-       mov      eax, esi
-       mov      qword ptr [rbp-0x08], rax
-       xor      r8, qword ptr [rdi+rax-0x08]
-       mov      rax, rcx
-       mul      rdx:rax, r8
-       bswap    rcx
-       add      rcx, qword ptr [rbp-0x08]
-       add      rcx, r8
-       xor      rax, rdx
+       add      rdx, rcx
+       xor      rax, qword ptr [rdi]
+       mov      ecx, esi
+       xor      rdx, qword ptr [rdi+rcx-0x08]
+       mulx     rsi, rdi, rax
+       bswap    rax
        add      rax, rcx
+       add      rax, rdx
+       xor      rdi, rsi
+       add      rax, rdi
        mov      rcx, rax
        shr      rcx, 37
        xor      rcx, rax
        mov      rax, 0xD1FFAB1E
        imul     rax, rcx
        mov      rcx, rax
        shr      rcx, 32
        xor      rax, rcx
-						;; size=102 bbWeight=0.50 PerfScore 8.50
+						;; size=93 bbWeight=0.50 PerfScore 7.38
 G_M20087_IG10:
-       add      rsp, 16
        pop      rbp
        ret      
-						;; size=6 bbWeight=0.50 PerfScore 0.88
+						;; size=2 bbWeight=0.50 PerfScore 0.75
 
-; Total bytes of code 444, prolog size 10, PerfScore 37.00, instruction count 117, allocated bytes for code 444 (MethodHash=64bbb188) for method System.IO.Hashing.XxHash3:HashLength0To16(ptr,uint,ulong):ulong (FullOpts)
+; Total bytes of code 413, prolog size 4, PerfScore 34.88, instruction count 109, allocated bytes for code 413 (MethodHash=64bbb188) for method System.IO.Hashing.XxHash3:HashLength0To16(ptr,uint,ulong):ulong (FullOpts)
 ; ============================================================
    -30 (-21.58 % of base) - System.UInt128:BigMul(System.UInt128,System.UInt128,byref):System.UInt128 
     ; Assembly listing for method System.UInt128:BigMul(System.UInt128,System.UInt128,byref):System.UInt128 (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; partially interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 25 single block inlinees; 4 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;* V00 arg0         [V00    ] (  0,  0   )  struct (16) zero-ref    multireg-arg single-def <System.UInt128>
 ;* V01 arg1         [V01    ] (  0,  0   )  struct (16) zero-ref    multireg-arg single-def <System.UInt128>
 ;  V02 arg2         [V02,T00] (  4,  4   )   byref  ->   r8         single-def
 ;* V03 loc0         [V03    ] (  0,  0   )    long  ->  zero-ref   
 ;* V04 loc1         [V04    ] (  0,  0   )    long  ->  zero-ref   
 ;* V05 loc2         [V05    ] (  0,  0   )    long  ->  zero-ref   
 ;* V06 loc3         [V06    ] (  0,  0   )  struct (16) zero-ref    <System.UInt128>
 ;* V07 loc4         [V07    ] (  0,  0   )  struct (16) zero-ref    <System.UInt128>
 ;* V08 loc5         [V08    ] (  0,  0   )  struct (16) zero-ref    <System.UInt128>
 ;# V09 OutArgs      [V09    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V10 tmp1         [V10    ] (  0,  0   )    long  ->  zero-ref    "dup spill"
 ;* V11 tmp2         [V11    ] (  0,  0   )  struct (16) zero-ref    "impAppendStmt" <System.UInt128>
 ;* V12 tmp3         [V12    ] (  0,  0   )  struct (16) zero-ref    "spilled call-like call argument" <System.UInt128>
 ;* V13 tmp4         [V13    ] (  0,  0   )  struct (16) zero-ref    "impAppendStmt" <System.UInt128>
 ;* V14 tmp5         [V14    ] (  0,  0   )  struct (16) zero-ref    "spilled call-like call argument" <System.UInt128>
 ;* V15 tmp6         [V15    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V16 tmp7         [V16    ] (  0,  0   )  struct (16) zero-ref    "impAppendStmt" <System.UInt128>
 ;* V17 tmp8         [V17    ] (  0,  0   )  struct (16) zero-ref    "spilled call-like call argument" <System.UInt128>
 ;* V18 tmp9         [V18    ] (  0,  0   )  struct (16) zero-ref    "impAppendStmt" <System.UInt128>
 ;* V19 tmp10        [V19    ] (  0,  0   )  struct (16) zero-ref    "spilled call-like call argument" <System.UInt128>
 ;* V20 tmp11        [V20    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.UInt128>
 ;* V21 tmp12        [V21    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V22 tmp13        [V22    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V23 tmp14        [V23    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V24 tmp15        [V24    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V25 tmp16        [V25    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V26 tmp17        [V26    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V27 tmp18        [V27    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V28 tmp19        [V28    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V29 tmp20        [V29    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V30 tmp21        [V30    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V31 tmp22        [V31    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V32 tmp23        [V32    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V33 tmp24        [V33    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V34 tmp25        [V34    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V35 tmp26        [V35    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;  V36 tmp27        [V36,T06] (  3,  3   )    long  ->   r9         "Inline stloc first use temp"
-;  V37 tmp28        [V37,T12] (  2,  2   )    long  ->  r10         "Inline stloc first use temp"
+;  V37 tmp28        [V37,T12] (  2,  2   )    long  ->  r11         "Inline stloc first use temp"
 ;* V38 tmp29        [V38    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V39 tmp30        [V39    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V40 tmp31        [V40    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V41 tmp32        [V41    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V42 tmp33        [V42    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V43 tmp34        [V43    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V44 tmp35        [V44    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V45 tmp36        [V45    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V46 tmp37        [V46    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V47 tmp38        [V47    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V48 tmp39        [V48    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;  V49 tmp40        [V49,T07] (  3,  3   )    long  ->   r9         "Inline stloc first use temp"
-;  V50 tmp41        [V50,T13] (  2,  2   )    long  ->  rax         "Inline stloc first use temp"
+;  V50 tmp41        [V50,T13] (  2,  2   )    long  ->  r11         "Inline stloc first use temp"
 ;* V51 tmp42        [V51    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V52 tmp43        [V52    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V53 tmp44        [V53    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V54 tmp45        [V54    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V55 tmp46        [V55    ] (  0,  0   )    long  ->  zero-ref    ld-addr-op "Inline ldloca(s) first use temp"
 ;* V56 tmp47        [V56    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V57 tmp48        [V57    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V58 tmp49        [V58    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V59 tmp50        [V59    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V60 tmp51        [V60    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V61 tmp52        [V61    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V62 tmp53        [V62    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V63 tmp54        [V63    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;  V64 tmp55        [V64,T05] (  4,  4   )    long  ->  r10         "Inline stloc first use temp"
 ;  V65 tmp56        [V65,T14] (  2,  2   )    long  ->  rax         "Inline stloc first use temp"
 ;* V66 tmp57        [V66    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V67 tmp58        [V67    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V68 tmp59        [V68    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V69 tmp60        [V69    ] (  0,  0   )  struct (16) zero-ref    ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V70 tmp61        [V70    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;  V71 tmp62        [V71,T08] (  3,  3   )    long  ->  rax         "Inline stloc first use temp"
 ;  V72 tmp63        [V72,T15] (  2,  2   )    long  ->  rcx         "Inline stloc first use temp"
 ;* V73 tmp64        [V73    ] (  0,  0   )  struct (16) zero-ref    multireg-ret ld-addr-op "NewObj constructor temp" <System.UInt128>
 ;* V74 tmp65        [V74    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;  V75 tmp66        [V75,T01] (  3,  3   )    long  ->  rdi         single-def "field V00._lower (fldOffset=0x0)" P-INDEP
 ;  V76 tmp67        [V76,T02] (  3,  3   )    long  ->  rsi         single-def "field V00._upper (fldOffset=0x8)" P-INDEP
-;  V77 tmp68        [V77,T03] (  3,  3   )    long  ->  [rbp-0x08]  single-def "field V01._lower (fldOffset=0x0)" P-INDEP
-;  V78 tmp69        [V78,T04] (  3,  3   )    long  ->  rcx         single-def "field V01._upper (fldOffset=0x8)" P-INDEP
+;  V77 tmp68        [V77,T03] (  3,  3   )    long  ->  rdx         single-def "field V01._lower (fldOffset=0x0)" P-INDEP
+;  V78 tmp69        [V78,T04] (  3,  3   )    long  ->  rax         single-def "field V01._upper (fldOffset=0x8)" P-INDEP
 ;* V79 tmp70        [V79    ] (  0,  0   )    long  ->  zero-ref    "field V06._lower (fldOffset=0x0)" P-INDEP
 ;* V80 tmp71        [V80    ] (  0,  0   )    long  ->  zero-ref    "field V06._upper (fldOffset=0x8)" P-INDEP
 ;* V81 tmp72        [V81    ] (  0,  0   )    long  ->  zero-ref    "field V07._lower (fldOffset=0x0)" P-INDEP
 ;* V82 tmp73        [V82    ] (  0,  0   )    long  ->  zero-ref    "field V07._upper (fldOffset=0x8)" P-INDEP
 ;* V83 tmp74        [V83    ] (  0,  0   )    long  ->  zero-ref    "field V08._lower (fldOffset=0x0)" P-INDEP
 ;* V84 tmp75        [V84    ] (  0,  0   )    long  ->  zero-ref    "field V08._upper (fldOffset=0x8)" P-INDEP
 ;* V85 tmp76        [V85    ] (  0,  0   )    long  ->  zero-ref    "field V11._lower (fldOffset=0x0)" P-INDEP
 ;* V86 tmp77        [V86    ] (  0,  0   )    long  ->  zero-ref    "field V11._upper (fldOffset=0x8)" P-INDEP
 ;* V87 tmp78        [V87    ] (  0,  0   )    long  ->  zero-ref    "field V12._lower (fldOffset=0x0)" P-INDEP
 ;* V88 tmp79        [V88    ] (  0,  0   )    long  ->  zero-ref    "field V12._upper (fldOffset=0x8)" P-INDEP
 ;* V89 tmp80        [V89    ] (  0,  0   )    long  ->  zero-ref    "field V13._lower (fldOffset=0x0)" P-INDEP
 ;* V90 tmp81        [V90    ] (  0,  0   )    long  ->  zero-ref    "field V13._upper (fldOffset=0x8)" P-INDEP
 ;* V91 tmp82        [V91    ] (  0,  0   )    long  ->  zero-ref    "field V14._lower (fldOffset=0x0)" P-INDEP
 ;* V92 tmp83        [V92    ] (  0,  0   )    long  ->  zero-ref    "field V14._upper (fldOffset=0x8)" P-INDEP
 ;* V93 tmp84        [V93    ] (  0,  0   )    long  ->  zero-ref    "field V15._lower (fldOffset=0x0)" P-INDEP
 ;* V94 tmp85        [V94    ] (  0,  0   )    long  ->  zero-ref    "field V15._upper (fldOffset=0x8)" P-INDEP
 ;* V95 tmp86        [V95    ] (  0,  0   )    long  ->  zero-ref    "field V16._lower (fldOffset=0x0)" P-INDEP
 ;* V96 tmp87        [V96    ] (  0,  0   )    long  ->  zero-ref    "field V16._upper (fldOffset=0x8)" P-INDEP
 ;* V97 tmp88        [V97    ] (  0,  0   )    long  ->  zero-ref    "field V17._lower (fldOffset=0x0)" P-INDEP
 ;* V98 tmp89        [V98    ] (  0,  0   )    long  ->  zero-ref    "field V17._upper (fldOffset=0x8)" P-INDEP
 ;* V99 tmp90        [V99    ] (  0,  0   )    long  ->  zero-ref    "field V18._lower (fldOffset=0x0)" P-INDEP
 ;* V100 tmp91       [V100    ] (  0,  0   )    long  ->  zero-ref    "field V18._upper (fldOffset=0x8)" P-INDEP
 ;* V101 tmp92       [V101    ] (  0,  0   )    long  ->  zero-ref    "field V19._lower (fldOffset=0x0)" P-INDEP
 ;* V102 tmp93       [V102    ] (  0,  0   )    long  ->  zero-ref    "field V19._upper (fldOffset=0x8)" P-INDEP
 ;* V103 tmp94       [V103    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V20._lower (fldOffset=0x0)" P-DEP
 ;* V104 tmp95       [V104    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V20._upper (fldOffset=0x8)" P-DEP
 ;* V105 tmp96       [V105    ] (  0,  0   )    long  ->  zero-ref    "field V22._lower (fldOffset=0x0)" P-INDEP
 ;* V106 tmp97       [V106    ] (  0,  0   )    long  ->  zero-ref    "field V22._upper (fldOffset=0x8)" P-INDEP
 ;* V107 tmp98       [V107    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V24.Item1 (fldOffset=0x0)" P-DEP
 ;* V108 tmp99       [V108    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V24.Item2 (fldOffset=0x8)" P-DEP
-;  V109 tmp100      [V109,T16] (  2,  2   )    long  ->  [rbp-0x10]  spill-single-def "field V25.Item1 (fldOffset=0x0)" P-INDEP
-;  V110 tmp101      [V110,T17] (  2,  2   )    long  ->  [rbp-0x18]  spill-single-def "field V25.Item2 (fldOffset=0x8)" P-INDEP
+;  V109 tmp100      [V109,T16] (  2,  2   )    long  ->  rcx         "field V25.Item1 (fldOffset=0x0)" P-INDEP
+;  V110 tmp101      [V110,T17] (  2,  2   )    long  ->   r9         "field V25.Item2 (fldOffset=0x8)" P-INDEP
 ;* V111 tmp102      [V111    ] (  0,  0   )    long  ->  zero-ref    "field V28._lower (fldOffset=0x0)" P-INDEP
 ;* V112 tmp103      [V112    ] (  0,  0   )    long  ->  zero-ref    "field V28._upper (fldOffset=0x8)" P-INDEP
 ;* V113 tmp104      [V113    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V30.Item1 (fldOffset=0x0)" P-DEP
 ;* V114 tmp105      [V114    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V30.Item2 (fldOffset=0x8)" P-DEP
-;  V115 tmp106      [V115,T09] (  3,  3   )    long  ->  rax         "field V31.Item1 (fldOffset=0x0)" P-INDEP
-;  V116 tmp107      [V116,T18] (  2,  2   )    long  ->  rdx         "field V31.Item2 (fldOffset=0x8)" P-INDEP
+;  V115 tmp106      [V115,T09] (  3,  3   )    long  ->  rdx         "field V31.Item1 (fldOffset=0x0)" P-INDEP
+;  V116 tmp107      [V116,T18] (  2,  2   )    long  ->  r10         "field V31.Item2 (fldOffset=0x8)" P-INDEP
 ;* V117 tmp108      [V117    ] (  0,  0   )    long  ->  zero-ref    "field V34._lower (fldOffset=0x0)" P-INDEP
 ;* V118 tmp109      [V118    ] (  0,  0   )    long  ->  zero-ref    "field V34._upper (fldOffset=0x8)" P-INDEP
 ;* V119 tmp110      [V119    ] (  0,  0   )    long  ->  zero-ref    "field V38._lower (fldOffset=0x0)" P-INDEP
 ;  V120 tmp111      [V120,T19] (  2,  2   )    long  ->  r10         "field V38._upper (fldOffset=0x8)" P-INDEP
 ;* V121 tmp112      [V121    ] (  0,  0   )    long  ->  zero-ref    "field V41._lower (fldOffset=0x0)" P-INDEP
 ;* V122 tmp113      [V122    ] (  0,  0   )    long  ->  zero-ref    "field V41._upper (fldOffset=0x8)" P-INDEP
 ;* V123 tmp114      [V123    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V43.Item1 (fldOffset=0x0)" P-DEP
 ;* V124 tmp115      [V124    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V43.Item2 (fldOffset=0x8)" P-DEP
-;  V125 tmp116      [V125,T10] (  3,  3   )    long  ->  rax         "field V44.Item1 (fldOffset=0x0)" P-INDEP
-;  V126 tmp117      [V126,T20] (  2,  2   )    long  ->  rdx         "field V44.Item2 (fldOffset=0x8)" P-INDEP
+;  V125 tmp116      [V125,T10] (  3,  3   )    long  ->  rdx         "field V44.Item1 (fldOffset=0x0)" P-INDEP
+;  V126 tmp117      [V126,T20] (  2,  2   )    long  ->  rdi         "field V44.Item2 (fldOffset=0x8)" P-INDEP
 ;* V127 tmp118      [V127    ] (  0,  0   )    long  ->  zero-ref    "field V47._lower (fldOffset=0x0)" P-INDEP
 ;* V128 tmp119      [V128    ] (  0,  0   )    long  ->  zero-ref    "field V47._upper (fldOffset=0x8)" P-INDEP
 ;* V129 tmp120      [V129    ] (  0,  0   )    long  ->  zero-ref    "field V51._lower (fldOffset=0x0)" P-INDEP
-;  V130 tmp121      [V130,T21] (  2,  2   )    long  ->  [rbp-0x20]  spill-single-def "field V51._upper (fldOffset=0x8)" P-INDEP
+;  V130 tmp121      [V130,T21] (  2,  2   )    long  ->  rdi         "field V51._upper (fldOffset=0x8)" P-INDEP
 ;* V131 tmp122      [V131    ] (  0,  0   )    long  ->  zero-ref    "field V56._lower (fldOffset=0x0)" P-INDEP
 ;* V132 tmp123      [V132    ] (  0,  0   )    long  ->  zero-ref    "field V56._upper (fldOffset=0x8)" P-INDEP
 ;* V133 tmp124      [V133    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V58.Item1 (fldOffset=0x0)" P-DEP
 ;* V134 tmp125      [V134    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V58.Item2 (fldOffset=0x8)" P-DEP
 ;  V135 tmp126      [V135,T11] (  3,  3   )    long  ->  rax         "field V59.Item1 (fldOffset=0x0)" P-INDEP
 ;  V136 tmp127      [V136,T22] (  2,  2   )    long  ->  rdx         "field V59.Item2 (fldOffset=0x8)" P-INDEP
 ;* V137 tmp128      [V137    ] (  0,  0   )    long  ->  zero-ref    "field V62._lower (fldOffset=0x0)" P-INDEP
 ;* V138 tmp129      [V138    ] (  0,  0   )    long  ->  zero-ref    "field V62._upper (fldOffset=0x8)" P-INDEP
 ;* V139 tmp130      [V139    ] (  0,  0   )    long  ->  zero-ref    "field V66._lower (fldOffset=0x0)" P-INDEP
 ;  V140 tmp131      [V140,T23] (  2,  2   )    long  ->  rdx         "field V66._upper (fldOffset=0x8)" P-INDEP
 ;* V141 tmp132      [V141    ] (  0,  0   )    long  ->  zero-ref    "field V69._lower (fldOffset=0x0)" P-INDEP
 ;* V142 tmp133      [V142    ] (  0,  0   )    long  ->  zero-ref    "field V69._upper (fldOffset=0x8)" P-INDEP
 ;* V143 tmp134      [V143    ] (  0,  0   )    long  ->  zero-ref    "field V73._lower (fldOffset=0x0)" P-INDEP
 ;  V144 tmp135      [V144,T24] (  2,  2   )    long  ->  rdx         "field V73._upper (fldOffset=0x8)" P-INDEP
 ;
-; Lcl frame size = 32
+; Lcl frame size = 0
 
 G_M54025_IG01:
        push     rbp
-       sub      rsp, 32
-       lea      rbp, [rsp+0x20]
-						;; size=10 bbWeight=1 PerfScore 1.75
+       mov      rbp, rsp
+       mov      rax, rcx
+						;; size=7 bbWeight=1 PerfScore 1.50
 G_M54025_IG02:
-       mov      qword ptr [rbp-0x08], rdx
-       mov      rax, rdi
-       mul      rdx:rax, rdx
-       mov      qword ptr [rbp-0x10], rax
-       mov      qword ptr [rbp-0x18], rdx
-       mov      rax, rsi
-       mul      rdx:rax, qword ptr [rbp-0x08]
-       mov      r9, qword ptr [rbp-0x18]
-       add      r9, rax
-       cmp      r9, rax
-       setb     al
-       movzx    rax, al
-       mov      r10d, eax
-       add      r10, rdx
-       mov      rax, rdi
-       mul      rdx:rax, rcx
-       add      r9, rax
-       cmp      r9, rax
-       setb     al
-       movzx    rax, al
-       add      rax, rdx
-       mov      qword ptr [rbp-0x20], rax
-       mov      rdx, qword ptr [rbp-0x10]
-       mov      qword ptr [r8], rdx
+       mulx     r9, rcx, rdi
+       mulx     r10, rdx, rsi
+       add      r9, rdx
+       cmp      r9, rdx
+       setb     dl
+       movzx    rdx, dl
+       mov      r11d, edx
+       add      r10, r11
+       mov      rdx, rdi
+       mulx     rdi, rdx, rax
+       add      r9, rdx
+       cmp      r9, rdx
+       setb     dl
+       movzx    rdx, dl
+       mov      r11d, edx
+       add      rdi, r11
+       mov      qword ptr [r8], rcx
        mov      qword ptr [r8+0x08], r9
-       mov      rax, rsi
-       mul      rdx:rax, rcx
+       mov      rdx, rsi
+       mulx     rdx, rax, rax
        add      r10, rax
        cmp      r10, rax
        setb     al
        movzx    rax, al
        add      rdx, rax
-       mov      rax, r10
-       add      rax, qword ptr [rbp-0x20]
+       lea      rax, [r10+rdi]
        cmp      rax, r10
        setb     cl
        movzx    rcx, cl
        add      rdx, rcx
-						;; size=123 bbWeight=1 PerfScore 30.25
+						;; size=100 bbWeight=1 PerfScore 21.25
 G_M54025_IG03:
-       add      rsp, 32
        pop      rbp
        ret      
-						;; size=6 bbWeight=1 PerfScore 1.75
+						;; size=2 bbWeight=1 PerfScore 1.50
 
-; Total bytes of code 139, prolog size 10, PerfScore 33.75, instruction count 44, allocated bytes for code 139 (MethodHash=0f562cf6) for method System.UInt128:BigMul(System.UInt128,System.UInt128,byref):System.UInt128 (FullOpts)
+; Total bytes of code 109, prolog size 4, PerfScore 24.25, instruction count 35, allocated bytes for code 109 (MethodHash=0f562cf6) for method System.UInt128:BigMul(System.UInt128,System.UInt128,byref):System.UInt128 (FullOpts)
 ; ============================================================
    -15 (-9.43 % of base) - System.Decimal+DecCalc:Div128By96(byref,byref):uint 
     ; Assembly listing for method System.Decimal+DecCalc:Div128By96(byref,byref):uint (FullOpts)
 ; Emitting BLENDED_CODE for x64 + VEX + EVEX on Unix
 ; FullOpts code
 ; optimized code
 ; rbp based frame
 ; fully interruptible
 ; No PGO data
 ; 0 inlinees with PGO data; 8 single block inlinees; 2 inlinees without PGO data
 ; Final local variable assignments
 ;
 ;  V00 arg0         [V00,T06] (  6,  4.50)   byref  ->  rdi         single-def
 ;  V01 arg1         [V01,T07] (  4,  3.50)   byref  ->  rsi         single-def
 ;  V02 loc0         [V02,T08] (  4,  3   )    long  ->  rax        
 ;  V03 loc1         [V03,T02] (  6, 12.50)     int  ->  rcx        
-;  V04 loc2         [V04,T04] (  5,  9.50)     int  ->  [rbp-0x04] 
-;  V05 loc3         [V05,T00] ( 11, 19   )     int  ->   r9        
+;  V04 loc2         [V04,T04] (  5,  9.50)     int  ->  rax        
+;  V05 loc3         [V05,T00] ( 11, 19   )     int  ->  r10        
 ;  V06 loc4         [V06,T05] (  3,  8.50)    long  ->  rsi         ld-addr-op
-;  V07 loc5         [V07,T09] (  4,  2   )     int  ->  rdx        
-;  V08 loc6         [V08,T01] (  6, 13.50)    long  ->   r8        
+;  V07 loc5         [V07,T09] (  4,  2   )     int  ->   r8        
+;  V08 loc6         [V08,T01] (  6, 13.50)    long  ->   r9        
 ;# V09 OutArgs      [V09    ] (  1,  1   )  struct ( 0) [rsp+0x00]  do-not-enreg[XS] addr-exposed "OutgoingArgSpace" <Empty>
 ;* V10 tmp1         [V10    ] (  0,  0   )  struct ( 8) zero-ref    multireg-ret multireg-dest "dup spill" <System.ValueTuple`2[uint,uint]>
 ;  V11 tmp2         [V11,T03] (  3, 12   )     int  ->  rdx         "impSpillLclRefs"
 ;* V12 tmp3         [V12    ] (  0,  0   )   byref  ->  zero-ref    "Inlining Arg"
 ;* V13 tmp4         [V13    ] (  0,  0   )  struct ( 8) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Inline return value spill temp" <System.ValueTuple`2[uint,uint]>
 ;* V14 tmp5         [V14    ] (  0,  0   )  struct ( 8) zero-ref    do-not-enreg[SRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[uint,uint]>
 ;* V15 tmp6         [V15    ] (  0,  0   )    long  ->  zero-ref    "Inline return value spill temp"
 ;* V16 tmp7         [V16    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V17 tmp8         [V17    ] (  0,  0   )    long  ->  zero-ref    "Inlining Arg"
 ;* V18 tmp9         [V18    ] (  0,  0   )  struct (16) zero-ref    do-not-enreg[SBRM] multireg-ret multireg-dest "Return value temp for multireg return" <System.ValueTuple`2[ulong,ulong]>
 ;* V19 tmp10        [V19    ] (  0,  0   )  struct (16) zero-ref    multireg-ret multireg-dest "Inline stloc first use temp" <System.ValueTuple`2[ulong,ulong]>
 ;* V20 tmp11        [V20    ] (  0,  0   )   byref  ->  zero-ref    "Inlining Arg"
 ;* V21 tmp12        [V21    ] (  0,  0   )   byref  ->  zero-ref    "Inlining Arg"
 ;  V22 tmp13        [V22,T12] (  2,  1   )     int  ->  rax         "field V10.Item1 (fldOffset=0x0)" P-INDEP
-;  V23 tmp14        [V23,T13] (  2,  1   )     int  ->  [rbp-0x08]  spill-single-def "field V10.Item2 (fldOffset=0x4)" P-INDEP
+;  V23 tmp14        [V23,T13] (  2,  1   )     int  ->  [rbp-0x04]  spill-single-def "field V10.Item2 (fldOffset=0x4)" P-INDEP
 ;* V24 tmp15        [V24    ] (  0,  0   )     int  ->  zero-ref    do-not-enreg[] "field V13.Item1 (fldOffset=0x0)" P-DEP
 ;* V25 tmp16        [V25    ] (  0,  0   )     int  ->  zero-ref    do-not-enreg[] "field V13.Item2 (fldOffset=0x4)" P-DEP
 ;* V26 tmp17        [V26    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V18.Item1 (fldOffset=0x0)" P-DEP
 ;* V27 tmp18        [V27    ] (  0,  0   )    long  ->  zero-ref    do-not-enreg[] "field V18.Item2 (fldOffset=0x8)" P-DEP
-;  V28 tmp19        [V28,T10] (  3,  1.50)    long  ->  rax         "field V19.Item1 (fldOffset=0x0)" P-INDEP
-;  V29 tmp20        [V29,T14] (  2,  1   )    long  ->  rdx         "field V19.Item2 (fldOffset=0x8)" P-INDEP
+;  V28 tmp19        [V28,T10] (  3,  1.50)    long  ->  rdx         "field V19.Item1 (fldOffset=0x0)" P-INDEP
+;  V29 tmp20        [V29,T14] (  2,  1   )    long  ->   r8         "field V19.Item2 (fldOffset=0x8)" P-INDEP
 ;  V30 cse0         [V30,T11] (  3,  1.50)    long  ->  rsi         "CSE #02: moderate"
 ;
 ; Lcl frame size = 16
 
 G_M25057_IG01:
        push     rbp
        sub      rsp, 16
        lea      rbp, [rsp+0x10]
 						;; size=10 bbWeight=1 PerfScore 1.75
 G_M25057_IG02:
        mov      rax, qword ptr [rdi+0x08]
        mov      ecx, dword ptr [rsi+0x08]
        mov      edx, ecx
        cmp      rax, rdx
-       jb       SHORT G_M25057_IG13
+       jb       SHORT G_M25057_IG11
 						;; size=14 bbWeight=1 PerfScore 5.50
 G_M25057_IG03:
        mov      rdx, rax
        shr      rdx, 32
        div      edx:eax, ecx
-       mov      dword ptr [rbp-0x08], edx
+       mov      dword ptr [rbp-0x04], edx
        mov      rsi, qword ptr [rsi]
-       mov      dword ptr [rbp-0x04], eax
        mov      r8d, eax
-       mov      rax, r8
-       mul      rdx:rax, rsi
-       mov      r8, qword ptr [rdi]
-       sub      r8, rax
-       mov      r9d, dword ptr [rbp-0x08]
-       sub      r9d, edx
-       not      rax
-       cmp      rax, r8
-       jb       SHORT G_M25057_IG05
-       not      edx
-       cmp      edx, r9d
-       jb       SHORT G_M25057_IG06
-						;; size=55 bbWeight=0.50 PerfScore 19.88
+       mov      rdx, r8
+       mulx     r8, rdx, rsi
+       mov      r9, qword ptr [rdi]
+       sub      r9, rdx
+       mov      r10d, dword ptr [rbp-0x04]
+       sub      r10d, r8d
+       not      rdx
+       cmp      rdx, r9
+       jb       SHORT G_M25057_IG04
+       not      r8d
+       cmp      r8d, r10d
+       jae      SHORT G_M25057_IG09
+       jmp      SHORT G_M25057_IG05
+						;; size=57 bbWeight=0.50 PerfScore 20.38
 G_M25057_IG04:
-       mov      eax, dword ptr [rbp-0x04]
-       jmp      SHORT G_M25057_IG11
-       align    [0 bytes for IG07]
-						;; size=5 bbWeight=0.25 PerfScore 0.75
+       dec      r10d
+       mov      edx, r8d
+       not      edx
+       cmp      edx, r10d
+       ja       SHORT G_M25057_IG09
+						;; size=13 bbWeight=0.50 PerfScore 1.00
 G_M25057_IG05:
-       dec      r9d
-       mov      eax, edx
-       not      eax
-       cmp      eax, r9d
-       ja       SHORT G_M25057_IG15
-						;; size=12 bbWeight=0.50 PerfScore 1.00
+       align    [0 bytes for IG06]
+						;; size=0 bbWeight=0.50 PerfScore 0.00
 G_M25057_IG06:
-       jmp      SHORT G_M25057_IG09
-						;; size=2 bbWeight=0.50 PerfScore 1.00
-G_M25057_IG07:
-       cmp      r9d, ecx
-       jb       SHORT G_M25057_IG11
-						;; size=5 bbWeight=4 PerfScore 5.00
-G_M25057_IG08:
-       mov      dword ptr [rbp-0x04], eax
-						;; size=3 bbWeight=2 PerfScore 2.00
-G_M25057_IG09:
-       mov      eax, dword ptr [rbp-0x04]
        dec      eax
-       add      r8, rsi
-       add      r9d, ecx
-       cmp      r8, rsi
-       jae      SHORT G_M25057_IG07
-						;; size=16 bbWeight=4 PerfScore 12.00
-G_M25057_IG10:
-       mov      edx, r9d
-       lea      r9d, [rdx+0x01]
+       add      r9, rsi
+       add      r10d, ecx
+       cmp      r9, rsi
+       jae      SHORT G_M25057_IG08
+						;; size=13 bbWeight=4 PerfScore 8.00
+G_M25057_IG07:
+       mov      edx, r10d
+       lea      r10d, [rdx+0x01]
        cmp      edx, ecx
-       jae      SHORT G_M25057_IG07
+       jb       SHORT G_M25057_IG09
 						;; size=11 bbWeight=2 PerfScore 4.00
-G_M25057_IG11:
-       mov      qword ptr [rdi], r8
-       mov      dword ptr [rdi+0x08], r9d
+G_M25057_IG08:
+       cmp      r10d, ecx
+       jae      SHORT G_M25057_IG06
+						;; size=5 bbWeight=4 PerfScore 5.00
+G_M25057_IG09:
+       mov      qword ptr [rdi], r9
+       mov      dword ptr [rdi+0x08], r10d
 						;; size=7 bbWeight=0.50 PerfScore 1.00
+G_M25057_IG10:
+       add      rsp, 16
+       pop      rbp
+       ret      
+						;; size=6 bbWeight=0.50 PerfScore 0.88
+G_M25057_IG11:
+       xor      eax, eax
+						;; size=2 bbWeight=0.50 PerfScore 0.12
 G_M25057_IG12:
        add      rsp, 16
        pop      rbp
        ret      
 						;; size=6 bbWeight=0.50 PerfScore 0.88
-G_M25057_IG13:
-       xor      eax, eax
-						;; size=2 bbWeight=0.50 PerfScore 0.12
-G_M25057_IG14:
-       add      rsp, 16
-       pop      rbp
-       ret      
-						;; size=6 bbWeight=0.50 PerfScore 0.88
-G_M25057_IG15:
-       mov      eax, dword ptr [rbp-0x04]
-       jmp      SHORT G_M25057_IG11
-						;; size=5 bbWeight=0.25 PerfScore 0.75
 
-; Total bytes of code 159, prolog size 10, PerfScore 56.50, instruction count 60, allocated bytes for code 163 (MethodHash=8d9d9e1e) for method System.Decimal+DecCalc:Div128By96(byref,byref):uint (FullOpts)
+; Total bytes of code 144, prolog size 10, PerfScore 48.50, instruction count 53, allocated bytes for code 148 (MethodHash=8d9d9e1e) for method System.Decimal+DecCalc:Div128By96(byref,byref):uint (FullOpts)
 ; ============================================================

    Note: some changes were skipped as they were too large to fit into a comment.

    Larger list of diffs: https://gist.github.com/MihuBot/ff306e010422bdd12cfe093ad597e7d5

  3. MihuBot commented on Sep 4, 2026

    @MihuBot
    MihuBot
    on Sep 4, 2026
    OwnerAuthor

    @MichalPetryka

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